Microstrip Impedance: Theory to PCB Layout
A practical guide to designing controlled-impedance microstrip traces on PCBs. Covers the Hammerstad-Jensen equations, material selection, manufacturing.
Contents
Why 50Ω Matters
So why 50Ω? It's not some magic number that fell from the sky. Back in the day, engineers realized that coaxial cables had to balance two competing needs: handling power without arcing (which wants low impedance) and keeping losses down (which wants higher impedance, around 77Ω for air dielectric). They settled on 50Ω as the sweet spot, and it stuck. Now it's everywhere in RF work — test equipment, connectors, amplifiers, antennas. If you're doing video instead, you'll see 75Ω. High-speed digital folks often use 100Ω differential pairs.
Here's the thing about impedance mismatches: at DC and low frequencies, nobody cares. The signal moves slowly enough that reflections settle out before they cause problems. But as frequencies climb, those reflections start biting. There's a rough threshold where you need to start worrying:
In this equation, vₚ is your propagation velocity (typically around 0.6c on FR4) and l is the trace length. Run the numbers for a 10cm trace on standard FR4, and you get about 900 MHz. Above that frequency, impedance control stops being optional.
Most engineers skip proper impedance design on their first few boards and regret it later when they're debugging mysterious signal integrity issues at 2 AM before a demo.
The Hammerstad-Jensen Equations
You'll find plenty of online calculators using the simplified IPC-2141 equations. They're fine for ballpark estimates — accurate to maybe ±5%. But if you're manufacturing something that matters, you want the Hammerstad-Jensen formulas from 1980, refined with Wadell's corrections. These get you down to ±1% accuracy, which is about as good as you can expect given manufacturing tolerances anyway.
The math splits into two cases depending on your trace aspect ratio. For narrow traces where W/H < 1:
And for wide traces where W/H ≥ 1:
The Wₑ term is your effective width — it accounts for the fact that copper traces have actual thickness, not the zero-height abstraction we pretend they are in simple models. And *ε*eff is the effective dielectric constant, which is complicated because your field lines don't live entirely in the substrate. Some of them are in air above the trace, so the effective dielectric constant ends up somewhere between εᵣ of your board material and 1.0 (air).
Material Selection
Choosing your substrate material is one of those decisions that seems simple until you actually look at the options. Here's what you're typically choosing between:
| Material | εᵣ | tan δ | Use case |
|---|---|---|---|
| FR4 standard | 4.2–4.5 | 0.020 | General digital, <1 GHz RF |
| FR4 high-frequency | 3.9–4.1 | 0.015 | DC–3 GHz |
| Rogers 4003C | 3.38 ±0.05 | 0.0021 | RF, microwave to 10 GHz |
| Rogers 4350B | 3.48 ±0.05 | 0.0037 | RF, microwave to 10 GHz |
| PTFE (PTFE/glass) | 2.10–2.55 | 0.0009 | Microwave, mmWave |
| Alumina 96% | 9.6 | 0.0001 | High-power RF, hybrids |
PTFE-based materials are what you reach for when you're doing microwave or mmWave work and loss is killing you. Alumina substrates show up in high-power RF and hybrid circuits where you need the thermal performance.
Manufacturing Tolerances
Let's talk about what your PCB fab house can actually achieve, because this determines whether your careful impedance calculations mean anything in the real world.
A typical manufacturer will hold these tolerances on a standard order:
- Trace width: ±0.05mm (±2 mil) is normal. If you pay extra for controlled impedance, you might get ±0.025mm (±1 mil).
- Dielectric thickness: ±10% is standard. Impedance-controlled stackups get you down to ±5%.
- Copper thickness: ±10% is pretty much what you get everywhere.
Practical Design Rules
Here's where theory meets the actual board layout you're doing in your CAD tool at midnight.
Target 50Ω for RF work and 100Ω differential for high-speed digital. These are standards for good reason — your connectors, test equipment, and reference designs all assume them. On a typical 1.6mm FR4 board with 1oz copper, you're looking at roughly 2.8mm trace width for 50Ω single-ended. For 100Ω differential pairs, you want something like 0.12mm spacing between 1.8mm traces. These are ballpark numbers — use a proper calculator for your actual stackup. Keep your reference planes solid. This one trips up a lot of people. Any void, slot, or split in the ground plane under your controlled-impedance trace changes the local impedance in ways that are hard to predict and harder to fix after the board comes back. Route RF traces away from board edges where the reference plane might be cut or interrupted. If you have to cross a split, do it at 90° to minimize the distance without a return path. Stitch vias around RF traces. For microstrip lines, you want ground vias on either side of the trace, spaced about λ/20 apart. This suppresses parallel-plate waveguide modes that can radiate and cause coupling between traces. It's one of those things that doesn't show up in simple simulations but matters in the real world, especially above a few GHz. Match your discontinuities. Every connector launch, via transition, and component pad creates an impedance discontinuity. A via, for instance, has capacitance to ground and inductance from the barrel — it looks inductive overall. You can compensate by reducing pad sizes (creating an anti-pad in the ground plane) or by carefully controlling the void size around via transitions. The goal is to make the via's impedance match the trace impedance, even if the geometry looks weird. Some engineers add small sections of wider or narrower trace to tune out discontinuities. It works, but it requires either simulation or a lot of experience to get right.Verification
After you've done all your calculations and laid out the board, you're not done. Use our Microstrip Impedance Calculator to compute your trace dimensions for your specific stackup. Then — and this is important — confirm those dimensions with your board house's stackup impedance calculator. Different fabs use different cores and prepregs, and the actual dielectric thicknesses can vary from what you assumed.
For production runs, request test coupons. These are separate traces on the panel with the same geometry as your critical impedance-controlled traces. After fabrication, you can measure them with a TDR (time-domain reflectometer) to verify the actual impedance before you commit to assembling hundreds of boards. A TDR shows you exactly where impedance discontinuities are and how bad they are. It's the difference between guessing and knowing.
Most board houses that do controlled-impedance work will provide TDR measurements of your coupons as part of the service. If they don't offer this, find a different fab house for RF work.
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