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Ground Plane Impedance vs Frequency

Calculate PCB ground plane AC impedance, skin depth, and inductive reactance vs frequency. Analyze ground return paths for EMC compliance.

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Formula

δ=1/√(pifmusigma),RAC=RDC×t/(2δ)δ = 1/√(pi fmusigma), R_AC = R_DC × t/(2δ)
δ— Skin depth (m)
σ— Conductivity (S/m)

How It Works

The Ground Plane Impedance Calculator computes DC resistance, AC resistance (skin effect), and inductive reactance for PCB ground paths — essential for EMC design, signal integrity, and power distribution network analysis. EMC engineers use this to identify ground bounce sources that cause 6-20 dB increased radiated emissions when ground impedance exceeds 10 mohm at problem frequencies.

Per Henry Ott's 'EMC Engineering' and Johnson/Graham's 'High-Speed Digital Design,' ground plane impedance Z = sqrt(R_AC^2 + X_L^2). DC resistance R_DC = rho x L / (W x T), where rho = 1.724e-8 ohm-m for copper. AC resistance increases due to skin effect: R_AC = R_DC x T / (2 x delta), where skin depth delta = sqrt(2 / (omega x mu x sigma)). At 10 MHz, copper skin depth is 21 um; at 100 MHz, 6.6 um.

Inductive reactance X_L = 2 x pi x f x L dominates above approximately 1 MHz. Per Johnson/Graham, plane inductance L approximately mu_0 x L / W = 1.26 nH/mm for unit width. At 100 MHz, a 10mm path with L = 12.6 nH has X_L = 7.9 ohm — far exceeding typical DC resistance of 1 mohm. This is why shortening ground paths (reducing L) is more effective than widening them (reducing R).

Ground bounce V = Z x I_return creates common-mode noise. Per Ott, if return current is 100 mA and ground impedance is 100 mohm at 100 MHz, ground bounce is 10 mV — potentially exceeding EMC margin on sensitive I/O. Ground plane slots and necks can increase local impedance 10-100x, creating emission hot spots.

Worked Example

Problem: Calculate impedance of 50mm long, 20mm wide, 1oz copper (35um) ground path at 10 MHz and 100 MHz. Estimate ground bounce with 200 mA return current.

Solution per Ott/Johnson:

  1. DC resistance: R_DC = 1.724e-8 x 0.05 / (0.02 x 35e-6) = 1.23 mohm
  2. Skin depth at 10 MHz: delta = sqrt(2/(2 x pi x 10e6 x 4 x pi x 1e-7 x 5.8e7)) = 21 um
  3. R_AC at 10 MHz: T = 35um > 2 x delta = 42um? No, so R_AC = R_DC = 1.23 mohm (skin effect not dominant)
  4. Inductance: L = 1.26e-9 x 50 / 20 = 3.15 nH (using mu_0 x length / width)
  5. X_L at 10 MHz: X_L = 2 x pi x 10e6 x 3.15e-9 = 198 mohm
  6. |Z| at 10 MHz: sqrt(1.23^2 + 198^2) = 198 mohm
  7. Ground bounce at 10 MHz: V = 0.2 x 0.198 = 39.6 mV
  8. At 100 MHz: delta = 6.6 um; R_AC = 1.23 x 35/(2 x 6.6) = 3.26 mohm; X_L = 1.98 ohm; |Z| = 1.98 ohm
  9. Ground bounce at 100 MHz: V = 0.2 x 1.98 = 396 mV
Result: Ground bounce increases 10x from 10 to 100 MHz. 396 mV exceeds 300 mV CISPR 32 conducted immunity level — this ground path would cause EMC failures.

Practical Tips

  • ✓Keep ground return paths short and wide — inductance L is proportional to length/width. Doubling width halves inductance; halving length also halves inductance. For EMC, prioritize short paths over wide paths per Ott.
  • ✓Avoid ground plane splits under high-frequency traces — return current is forced around splits, increasing loop area and radiated emissions by 10-20 dB. Use stitching capacitors across splits if unavoidable per Johnson/Graham.
  • ✓Add via stitching every 10mm along ground planes — provides parallel inductance paths, reducing effective inductance by 50-70%. Critical for frequencies above 100 MHz per IPC-2141A.

Common Mistakes

  • ✗Assuming DC resistance dominates — per Johnson/Graham, inductive reactance exceeds DC resistance above approximately 1 MHz for typical PCB ground paths. At 100 MHz, inductance is 100-1000x more significant than resistance.
  • ✗Using narrow ground neck as sole connection between regions — a 1mm wide, 10mm long neck has 100x the impedance of a solid plane. Per Ott, ground bounce across such necks can reach 100+ mV, coupling directly to I/O traces as common-mode noise.
  • ✗Treating copper thickness as constant — 1oz copper after etching is typically 30-32um, not 35um. Additionally, plated areas (via pads) may have different thickness. Use 30um for conservative calculations per IPC-6012D.

Frequently Asked Questions

Ground plane impedance determines ground bounce magnitude (V = Z x I). Per Ott, ground bounce appears as common-mode voltage on all signals referenced to that ground — it couples to I/O cables as conducted emissions and creates radiated emissions via cable antenna effects. 50 mV ground bounce at 100 MHz can add 10 dB to radiated emissions, potentially failing CISPR 32 Class B.
Aluminum has 60% of copper's conductivity (sigma = 3.77e7 vs 5.8e7 S/m), increasing DC resistance by 50%. Skin depth is 1.25x larger, partially compensating for lower conductivity at high frequencies. For PCB ground planes, copper is standard; aluminum is common for chassis ground and enclosures where weight matters. Per MIL-HDBK-419A, both are acceptable for EMC when properly bonded.
Per Johnson/Graham: (1) Minimize path length — inductance is proportional to length; (2) Add via stitching — parallel paths divide inductance; (3) Use tight power-ground plane spacing (<0.1mm) — distributed capacitance provides low impedance at high frequencies; (4) Use 2oz copper instead of 1oz — helps with DC resistance but has diminishing returns above 10 MHz where inductance dominates.
f_crossover = R_DC / (2 x pi x L). For typical PCB ground (R_DC approximately 1 mohm, L approximately 10 nH): f_crossover = 0.001 / (6.28 x 10e-9) = 16 kHz. Above 16 kHz, inductance dominates. Per Johnson/Graham, for any practical EMC concern (>100 kHz), ground plane impedance is inductance-limited, not resistance-limited.
Slots force return current around them, increasing effective path length and loop area. Per Ott, a slot creates a slot antenna that radiates. A 50mm slot in a 100mm ground return path can increase impedance 5-10x and emissions 6-10 dB. Keep high-speed signals away from slots; use via stitching to bridge unavoidable slots with <10mm spacing per IPC-2141A.

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