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EMC

Power Supply Ripple Filter

Calculate LC filter attenuation, resonant frequency, and output ripple voltage. Design power supply EMC filters for ripple rejection.

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Formula

f0=1/(2π√LC),A=−40⋅log10(f/f0)dBf₀ = 1/(2π√LC), A = −40·log₁₀(f/f₀) dB

How It Works

The power supply ripple filter calculator determines LC component values and attenuation for post-regulator filtering — essential for sensitive analog circuits, precision ADCs, and RF systems. Power integrity engineers, mixed-signal designers, and EMC specialists use this tool to achieve <1 mV ripple from switching power supplies. According to TI application note SLVA630, a single-stage LC filter provides -40 dB/decade attenuation above its corner frequency f0 = 1/(2π√LC), with the relationship f0 = fsw/10^(A/40) determining required corner frequency for target attenuation A (dB). For a 500 kHz SMPS requiring 40 dB attenuation, f0 = 50 kHz. Per Analog Devices MT-101, output ripple comprises capacitive (ΔVc = ΔIL/(8×fsw×C)) and ESR (ΔVesr = ΔIL × ESR) components — modern MLCC ceramics with <10 mΩ ESR make ESR contribution negligible versus capacitive ripple. The filter's characteristic impedance Z0 = √(L/C) should match load impedance for optimal damping; mismatched impedance causes resonant peaking at f0 that can amplify noise by 10-20 dB. Critical consideration: MLCC capacitors lose 50-80% capacitance at DC bias — always use derated values in filter calculations.

Worked Example

Design a ripple filter to reduce 500 kHz SMPS noise from 50 mV to <1 mV for a 16-bit ADC reference supply. Requirements: 3.3 V at 100 mA, Z_load ≈ 33 Ω. Step 1: Calculate required attenuation — A = 20×log10(50/1) = 34 dB. Use 40 dB for margin. Step 2: Determine corner frequency — f0 = 500k/10^(40/40) = 50 kHz. Step 3: Calculate LC product — LC = 1/(2π×50k)² = 1.01×10^-9 s². Step 4: Match load impedance — For Z0 = 33 Ω: L/C = 1089, so L = √(1089 × 1.01×10^-9) = 33 µH. C = LC/L = 1.01×10^-9/33×10^-6 = 30.6 nF. Step 5: Select components — Use 33 µH inductor (Murata LQH32CN330K, 0.15 Ω DCR) and 47 nF C0G ceramic (no DC bias derating). Step 6: Add damping — Insert 10 Ω in series with 1 µF across main capacitor to damp resonance. Step 7: Verify — Filter attenuation at 500 kHz: 40 + 40×log10(500k/50k) = 40 + 40 = 80 dB. Residual ripple = 50 mV / 10^(80/20) = 5 µV. Output noise dominated by regulator and component noise, not ripple.

Practical Tips

  • ✓Per TI precision ADC design guide, use ferrite beads (600 Ω at 100 MHz type) instead of inductors for frequencies above 10 MHz — ferrite's resistive impedance provides natural damping without resonance issues
  • ✓Cascade two LC stages for >60 dB attenuation — single stage limited by capacitor self-resonance (typically 1-10 MHz for MLCC); second stage handles frequencies above first stage's effectiveness
  • ✓Add 10-100 nF C0G capacitor directly at ADC Vref pin — provides final high-frequency bypass that the main filter's inductance prevents from being effective

Common Mistakes

  • ✗Using X5R/X7R capacitors without DC bias derating — a 10 µF/6.3V X5R at 3.3 V DC retains only 5-6 µF effective capacitance, halving filter attenuation; use C0G/NP0 for filter applications or 2× rated voltage ceramics
  • ✗Ignoring resonant peaking — undamped LC filter amplifies noise 10-20 dB at f0; always add damping resistor (Rd = 0.5×Z0 typical) in series with a larger bypass capacitor
  • ✗Placing filter far from load — parasitic inductance (10 nH/cm) between filter and load allows high-frequency noise to bypass filter; keep filter-to-load distance <5 mm

Frequently Asked Questions

Per EMC design guidelines: Ripple filter targets specific SMPS switching frequency (100 kHz - 2 MHz) on DC output rail, designed for load impedance (1-100 Ω). Conducted emissions filter targets 150 kHz - 30 MHz broadband noise on AC mains input, designed for 50 Ω LISN impedance. Both use LC topology but different component values. Ripple filter: 10-100 µH, 10-100 µF. EMI filter: 0.1-10 mH common-mode choke, 0.1-1 µF Y-capacitors, 1-10 µF X-capacitors.
Per Murata inductor selection guide: DC current rating must exceed maximum load current plus ripple current: I_rated > I_load + ΔI_ripple/2. Saturation current (I_sat) is typically 20-40% above DC rating. Example: 100 mA load with 30 mA ripple requires I_rated > 115 mA. Also verify DCR voltage drop: V_drop = I_load × DCR < 1% of Vout for efficient operation. A 33 µH inductor with 0.5 Ω DCR drops 50 mV at 100 mA — acceptable for most applications.
Per Analog Devices AN-1144: A single capacitor provides only -20 dB/decade attenuation (versus -40 dB/decade for LC). For 40 dB attenuation at 500 kHz with capacitor only: requires fc = 500k/10^(40/20) = 5 kHz — impractically low for reasonable capacitor values. Additionally, low ESR capacitors connected directly to SMPS output can cause control loop instability. LC filter provides better attenuation with smaller components and maintains SMPS stability.
Per TI SLVA630: LC filter resonates at f0 = 1/(2π√LC) with Q = √(L/C)/R_total. High Q (low damping) causes 20-40 dB gain at resonance — a filter designed for 40 dB attenuation may instead amplify noise at f0. Prevention: (1) Add damping resistor Rd = √(L/C)/2 in series with a larger bypass capacitor (10× main filter cap), (2) Use ferrite bead instead of pure inductor — ferrite's resistive component provides inherent damping, (3) Ensure load resistance is close to Z0 = √(L/C) for natural damping.
Per Keysight application note 5992-0017EN: (1) Use 10× probe with <5 cm ground lead — long ground leads pick up noise, creating false readings, (2) Set oscilloscope to AC coupling, 20 MHz bandwidth limit (removes high-frequency probe artifacts), (3) Use tip-and-barrel technique: probe tip on output, ground barrel directly on ground plane, (4) For <1 mV measurements, use differential probe (Keysight N2790A) or spectrum analyzer. Common error: 50 mV ripple measurement with 10 cm ground lead may actually be 10 mV ripple + 40 mV ground loop noise.

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