Buck Converter: Inductor, Capacitor & Efficiency

When to Use a Buck Converter vs. LDO

Linear regulators (LDOs) are dead simple and produce clean output, but they're basically controlled heaters. All that excess voltage? Turned straight into heat: P = (V_in − V_out) × I_out. Drop 12V down to 3.3V at 1A and you're burning 8.7W — that's 73% of your input power going nowhere useful. You'll need a heatsink, and your efficiency numbers will make you wince.

Buck converters are more complex. You need an inductor, output capacitor, and either a controller IC or an integrated power stage. But you get 85–95% efficiency in return, which matters a lot when you're pushing real current or running off batteries.

So when does the added complexity pay off? Here's a quick rule:

For most PCB designs, if (V_in − V_out) × I_out exceeds about 0.5W, seriously consider a buck. Below that threshold, an LDO might be simpler and perfectly adequate. Above it, you're probably wasting power and board space on thermal management.

Fundamental Equations

The duty cycle in continuous conduction mode is straightforward:

For initial calculations, assume η = 0.88 (88% efficiency). You'll refine this later based on actual component losses, but it's a solid starting point that won't lead you astray.

The inductor value depends on how much ripple current you can tolerate. Most designs target 20–40% of the output current as ripple — enough to stay in continuous conduction mode without making the inductor unnecessarily large:

Your output capacitor sets the output voltage ripple. The ideal formula gives you the minimum:

But that's just the starting point. Real capacitors have ESR (equivalent series resistance), and that ESR adds additional ripple: ΔV_ESR = ΔI_L × ESR. Ceramic caps have low ESR, but electrolytics can surprise you. Always check the datasheet and add margin — most engineers skip this and regret it later when they're debugging noise issues at 2 AM.

Worked Example: 12V → 5V at 2A

Let's walk through a real design. You need 5V at 2A from a 12V input, and you've picked a switching frequency of 400 kHz (a common choice that balances efficiency and component size).

Step 1: Calculate duty cycle

D = 5 / (12 × 0.88) = 0.473

So the high-side FET is on 47.3% of each switching cycle.

Step 2: Choose ripple current

Let's go with 30% of output current as a reasonable middle ground: ΔI_L = 0.3 × 2A = 0.6A. This keeps us well within continuous conduction mode without oversizing the inductor.

Step 3: Calculate inductor value

L = 5 × (1 − 0.473) / (0.6 × 400,000) = 11 µH

Standard values near this are 10 µH or 15 µH. Let's use 10 µH — close enough, and ferrite inductors have ±20% tolerance anyway.

Step 4: Size the output capacitor

Say you want less than 50 mV of output ripple:

C = 0.6 / (8 × 400,000 × 0.05) = 3.75 µF

That's the theoretical minimum. In practice, use 10 µF to give yourself margin for capacitor tolerance, DC bias derating (ceramic caps lose capacitance under voltage), and any ESR contribution. A 10 µF X7R ceramic in 0805 or 1206 package will do the job.

Step 5: Check inductor current rating

Peak current through the inductor: I_peak = I_out + ΔI_L/2 = 2 + 0.3 = 2.3A

Select an inductor rated for at least 2.5A saturation current. You never want to hit saturation — efficiency collapses instantly when the core saturates, and your output voltage will droop under load.

Inductor Selection

Picking the right inductor involves more than just matching the inductance value. Here's what actually matters:

Inductance tolerance: ±20% is typical for ferrite cores, and that's fine. The value drifts with DC bias current anyway — the core saturates slightly even below the rated current, reducing effective inductance. Factor this into your ripple current calculations. Saturation current: This must exceed your peak current with margin. If the datasheet shows "saturation current" and "rated current," use the saturation spec. Some manufacturers are optimistic about their rated current numbers. DCR (DC resistance): Lower is better since conduction loss scales as I²×DCR. At 2A, even 50 mΩ costs you 200 mW. High-current inductors often use thick wire or multiple parallel strands to keep DCR down. SRF (self-resonant frequency): The inductor's parasitic capacitance creates a resonance. Keep SRF above 2× your switching frequency, or the inductor stops behaving like an inductor at the frequencies that matter.

For this 10 µH at 2A example, parts like the Würth 74437324100 or TDK SLF12555T-100M4R3 are common choices. Both are shielded, which helps with EMI if you're tight on board space.

Capacitor Selection

Output capacitors need to handle the ripple current without excessive heating or voltage ripple. Ceramic X5R or X7R dielectrics are the go-to choice — low ESR, good temperature stability, and available in small packages. Avoid Y5V; it loses 70% of its capacitance under DC bias and temperature swings. Completely useless for anything precision.

You can parallel ceramic with electrolytic if you need bulk capacitance for transient response, but ceramics alone usually work fine for steady-state ripple.

Input capacitors are equally important but often neglected. The buck converter draws pulsed current from the input — sharp current spikes at the switching frequency. Place a 10–100 µF bulk capacitor near the converter and a 1 µF ceramic right at the IC power pins. Poor input decoupling sprays switching noise across your entire board. I've debugged too many designs where inadequate input caps caused noise in analog circuits three inches away.

Efficiency Losses

No converter is perfect. Here's where your power actually goes:

1. Conduction loss: Current flowing through resistances — the FET on-resistance (RDS(on)) and inductor DCR. This scales as I²×R, so it dominates at high output currents. Synchronous buck converters use a low-side FET instead of a diode to reduce this loss. 2. Switching loss: Every time a FET switches, there's a brief moment when both voltage and current are non-zero. Power dissipated during switching transitions: P_sw = 0.5 × V_in × I_out × t_sw × f_sw. This is directly proportional to switching frequency, which is why cranking up f_sw to shrink your inductor has diminishing returns. 3. Gate charge loss: Driving the FET gates takes energy: P_g = Q_g × V_gs × f_sw per FET. With modern low-Q_g FETs this is usually small, but it adds up at high switching frequencies. 4. Inductor core loss: The magnetic core dissipates power due to hysteresis and eddy currents. This is frequency and flux-dependent, and you'll need to dig into the core material datasheet to estimate it properly. Ferrite core losses rise quickly above 500 kHz.

At 400 kHz with decent components, expect 88–92% efficiency. Push to 1 MHz and switching losses increase — efficiency typically drops to 83–87% unless you're using advanced low-Q_g FETs and paying attention to layout parasitics. Sometimes a bigger inductor and lower frequency is the better trade-off.

Before you commit to a BOM, model your design with the Buck Converter Calculator to verify duty cycle, inductor sizing, and capacitor requirements. It's faster than hand calculations and catches unit conversion mistakes that always seem to creep in.