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Signal IntegrityMarch 1, 20268 min read

S-Parameter De-embedding: Removing Fixture Connectors from VNA Measurements

A practical walkthrough of the S-parameter analysis pipeline: viewing raw VNA data, identifying connector response, applying time gating to isolate a PCB trace DUT, checking passivity, and cascading a de-embedding file to get clean trace-only S-parameters.

Contents

The Problem: Your VNA Measures the Fixture Too

You've just measured a 10 cm microstrip trace on a Rogers 4003C test board to characterize insertion loss from DC to 10 GHz. You export the .s2p file, plot S21, and immediately notice a broad notch around 7 GHz you didn't expect. Before you flag it as a board fabrication problem, ask yourself: did you calibrate to the SMA connector launch, or to the reference plane at the trace edge?

In most bench setups, the answer is the former. The two SMA connectors used to connect the board to the VNA are inside your calibration plane. Their combined response — including the via transitions, the connector body, and any discontinuity at the launch pad — is sitting on top of your trace measurement. De-embedding removes that fixture response so you're left with the trace S-parameters only.

The S-Parameter Analysis Pipeline tool lets you chain four operations on a single .s2p file: View, Passivity Check, Time Gate, and De-embed. Here is how to work through them in order.

Step 1: View — Know What You Are Looking At

Load your 2-port .s2p file from the VNA with these pipeline settings:

ParameterValue
Reference Impedance50 Ω
Freq Start0 (use file range)
Freq Stop0 (use file range)
OperationsView
The View operation plots S11 (return loss) and S21 (insertion loss) across the full frequency span of the file. On a well-matched microstrip trace you expect S11 to be below −15 dB through most of the band, rising only near connector resonances. S21 should decline smoothly with frequency — roughly following conductor and dielectric loss slopes.

What flags a connector-dominated response? Watch for:

  • A sharp S11 peak (poor return loss) below 2 GHz — typical of an SMA launch pad that is too wide for 50 Ω
  • Ripple in S21 with a periodicity that corresponds to twice the electrical length of the connector body (~50–100 ps round trip)
  • Any notch that coincides with a quarter-wave resonance of the connector pin length
If S21 looks unusually good up to 6 GHz and then falls off a cliff, you may be seeing the bandwidth limit of the connector itself rather than a genuine DUT loss mechanism.

Step 2: Passivity Check — Catch Calibration Errors Early

Before investing time in gating and de-embedding, run the Passivity Check operation. A passive, lossless 2-port must satisfy:

S112+S2121at every frequency|S_{11}|^2 + |S_{21}|^2 \leq 1 \quad \text{at every frequency}

If this sum exceeds 1.0 at any point — even by 0.01 — your file is non-passive. Common causes:

  • VNA calibration drift (recalibrate if the board temperature changed more than 5 °C since cal)
  • Port mismatch: the file was saved as 50 Ω but the VNA was set to 75 Ω during measurement
  • Connector movement between port-1 and port-2 measurement sweeps on a 1-port VNA
The Passivity Check reports the worst-case violation frequency and magnitude. A 0.5 dB violation at 9 GHz means your insertion loss numbers above 8 GHz should be treated with suspicion. Fix the calibration before proceeding — time gating cannot correct a passivity violation; it will only spread the error.

Step 3: Time Gate — Isolate the DUT

Time gating transforms the S-parameter data into the time domain (via IFFT), applies a windowed gate around the DUT response, then transforms back to frequency (FFT). The result is an S-parameter set where the connector responses have been suppressed.

For an SMA-to-SMA fixture measuring a 10 cm trace, typical gating parameters are:

  • Gate center: set to the mid-point of the trace electrical delay (~500 ps for 10 cm on FR4)
  • Gate span: trace electrical length plus ~100 ps margin on each side
  • Window function: Kaiser-Bessel (reduces time-domain sidelobes at the cost of frequency resolution)
After gating, re-plot S11 and S21. You should see:
  • S11 ripple reduced — the reflections from the connectors are gated out
  • S21 now rises slightly at high frequency relative to the ungated version — the connectors were adding insertion loss that is now removed
  • The notch you saw at 7 GHz is gone or much shallower — confirming it was a connector resonance, not a trace defect
One important caveat: time gating requires sufficient frequency span to achieve the needed time-domain resolution. The time-domain resolution is approximately Δt=1/BW\Delta t = 1/\text{BW}, so a 10 GHz sweep gives 100 ps resolution. Trying to separate a connector (50 ps delay) from a trace (500 ps delay) on a 3 GHz sweep (333 ps resolution) will not work — the responses overlap in time.

Step 4: De-embed — Apply the Fixture Model

Time gating is a broadband approximation. For highest accuracy, use a dedicated fixture de-embedding file — a separately measured .s2p of the SMA connector alone on a short thru substrate. The pipeline cascades its inverse (S-matrix inversion) with your DUT measurement:

[SDUT]=[Sfixture,port1]1[Smeasured][Sfixture,port2]1[S_{DUT}] = [S_{fixture,port1}]^{-1} \cdot [S_{measured}] \cdot [S_{fixture,port2}]^{-1}

To generate the fixture file, measure a matched thru board (same substrate, same launch geometry, zero-length trace) and save it as a separate .s2p. Load it into the De-embed operation.

De-embed InputValue
Port 1 fixture filesma_launch_port1.s2p
Port 2 fixture filesma_launch_port2.s2p
Reference impedance50 Ω
After de-embedding, the output S21 should show only the trace insertion loss. For a 10 cm Rogers 4003C trace, expect roughly −0.5 dB at 5 GHz and −1.2 dB at 10 GHz. Anything significantly worse points to a board defect, contamination, or a layout discontinuity.

Reading the Final Output

With the de-embedded S-parameters in hand, the three numbers that matter most are:

  1. Insertion loss at your signal bandwidth edge — if you are running a 10 Gbps NRZ signal, check S21 at 5 GHz (the Nyquist frequency). Keep it above −3 dB for clean eye opening.
  2. Return loss across the band — below −15 dB (VSWR < 1.4:1) is acceptable for most PCB traces. Below −20 dB is good.
  3. Group delay flatness — a steeply varying group delay causes intersymbol interference (ISI). The De-embed output includes a group delay plot; keep variation below ±20 ps across the signal band.
Use the S-Parameter Pipeline Tool to run all four operations on your own .s2p files without leaving the browser.

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