Flyback Converter Calculator
Calculate flyback converter turns ratio, peak primary and secondary currents, and power levels for isolated DC-DC converter design.
Formula
Reference: Unitrode Power Supply Design Seminar SEM600
How It Works
The flyback converter calculator computes turns ratio, peak currents, and magnetizing inductance for isolated DC-DC conversion — essential for AC-DC adapters, PoE systems, and multi-output power supplies. Power electronics engineers, charger designers, and industrial equipment developers use this tool to achieve galvanic isolation while maintaining 85-92% efficiency. According to Erickson & Maksimovic's 'Fundamentals of Power Electronics', flyback converters dominate the <75 W isolated supply market due to their single magnetic component and low parts count. The coupled inductor stores energy during the switch on-time (Epri = ½Lm×Ipk²) and transfers it to the secondary during off-time. The turns ratio N = Vin×D / ((Vout+Vf)×(1-D)) determines voltage transformation, while boundary conduction mode (BCM) at 50% duty cycle maximizes power transfer capability. TI application note SLVA057 specifies magnetizing inductance Lm = Vin×D/(fsw×ΔIL) for continuous conduction mode. Critical design parameter: the leakage inductance (typically 1-3% of Lm) causes voltage spikes exceeding 2×Vin on the primary switch, requiring RCD snubber or active clamp circuits per Power Integrations AN-19.
Worked Example
Design a 12 V to 5 V/2 A isolated flyback converter for industrial sensor interface. Requirements: 3.75 kV isolation, 88% minimum efficiency, <100 kHz switching frequency. Step 1: Calculate turns ratio — At D = 0.4, Vf = 0.5 V (Schottky): N = 12×0.4 / ((5+0.5)×0.6) = 1.45. Use N = 1.5 for standard winding ratio. Step 2: Calculate primary peak current — Pout = 10 W, η = 0.88. Pin = 11.4 W. At D = 0.4, Ipk = 2×Pin/(Vin×D) = 2×11.4/(12×0.4) = 4.75 A. Step 3: Select magnetizing inductance — For 30% ripple in CCM at 100 kHz: Lm = 12×0.4/(100k×0.3×4.75) = 33.7 µH. Use 33 µH. Step 4: Calculate output capacitor — For 50 mV ripple: Cout = 2×0.4/(100k×0.05) = 160 µF. Use 2×100 µF low-ESR electrolytics. Step 5: Snubber design — Leakage inductance ≈ 1 µH (3% of Lm). Peak voltage without snubber: Vin + N×(Vout+Vf) + Lleak×dI/dt = 12 + 8.25 + 1µ×4.75A/100ns = 67.5 V. Use 100 V MOSFET with RCD snubber (R=10k, C=1nF, D=UF4007).
Practical Tips
- ✓Per Fairchild AN-4137, use quasi-resonant (QR) switching to achieve valley switching, reducing turn-on losses by 50% and EMI by 10 dB compared to fixed-frequency PWM
- ✓Design the RCD snubber to clamp voltage spike at 80% of MOSFET Vds(max) — for 100 V MOSFET, clamp at 80 V; dissipated power = ½×Lleak×Ipk²×fsw = ½×1µH×25×100k = 1.25 W
- ✓Use planar transformers for power densities >10 W/cm³ — PCB-integrated windings achieve 1% leakage inductance versus 3-5% for bobbin-wound transformers
Common Mistakes
- ✗Ignoring transformer leakage inductance — 2% leakage (1 µH) with 5 A turn-off in 50 ns generates 100 V spike; without snubber, this destroys 60 V MOSFETs within microseconds
- ✗Undersizing the transformer core — flyback transformers must not saturate at peak current; EE16 cores handle only 15-20 W at 100 kHz; use RM8 or EE25 for 50 W designs
- ✗Using standard diodes for secondary rectification — PN diodes exhibit 100 ns reverse recovery, causing 5-8% efficiency loss; Schottky diodes (SS34, 40 V/3 A) essential for <24 V outputs
Frequently Asked Questions
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