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Thermal

Heatsink Calculator

Calculate required heatsink thermal resistance (θ_SA) and junction temperature for MOSFETs, IGBTs, and power ICs. Verify thermal design feasibility. Free results.

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Formula

θSA=(TJmax−TA)/PD−θJC−θCSθ_SA = (T_Jmax - T_A) / P_D - θ_JC - θ_CS

Reference: JEDEC JESD51 thermal measurement standard

θ_SA— Heatsink-to-ambient thermal resistance (°C/W)
T_Jmax— Maximum junction temperature (°C)
T_A— Ambient temperature (°C)
P_D— Power dissipation (W)
θ_JC— Junction-to-case thermal resistance (°C/W)
θ_CS— Case-to-heatsink thermal resistance (°C/W)

How It Works

Heatsink thermal resistance calculator computes θSA requirements for safe junction temperature operation — essential for power supply design, motor drives, and high-power amplifier thermal management. Thermal engineers, power electronics designers, and product reliability engineers use this to size heatsinks and verify thermal margins. Per JEDEC JESD51-12, total thermal resistance θJA = θJC + θCS + θSA, where θJC is specified by semiconductor manufacturer (TO-220: 1-2°C/W, D²PAK: 0.5-1°C/W per JEDEC), θCS depends on interface material (thermal grease: 0.1°C/W, dry contact: 0.5°C/W, thermal pad: 0.2-0.5°C/W), and θSA is the heatsink performance. Natural convection heatsinks achieve θSA = 3-20°C/W depending on size; forced air at 2 m/s improves θSA by 3-5× per AAVID application data.

Worked Example

Select heatsink for LM7805 regulator converting 12V to 5V at 1A load. Power dissipation: Pd = (12V - 5V) × 1A = 7W. From LM7805 datasheet: θJC = 4°C/W (TO-220), Tj(max) = 125°C. Design target: Tj = 100°C at Ta = 50°C (industrial environment). Required total θJA: θJA = (Tj - Ta)/Pd = (100 - 50)/7 = 7.14°C/W. With thermal paste θCS = 0.2°C/W: θSA(max) = 7.14 - 4 - 0.2 = 2.94°C/W. Select Aavid 531202B02500G (θSA = 2.5°C/W, 50mm × 50mm × 25mm). Verify: Tj = 50 + 7×(4 + 0.2 + 2.5) = 50 + 46.9 = 96.9°C — within 100°C target with 3°C margin. For outdoor applications (Ta = 70°C), upgrade to larger heatsink or add fan.

Practical Tips

  • ✓For natural convection, allow 10mm minimum clearance around heatsink fins — blocked airflow increases θSA by 50-100% per thermal design guidelines
  • ✓Black anodized heatsinks have 10-15% lower θSA than bare aluminum due to improved radiation — significant only at ΔT > 40°C above ambient
  • ✓Forced air at 2 m/s typically reduces θSA by 3-5×; consult manufacturer curves for specific heatsink. Fan selection: 1 CFM per 5W for small enclosures per AAVID thermal handbook

Common Mistakes

  • ✗Using heatsink θSA without considering mounting orientation — vertical fins with natural convection have 20-30% lower θSA than horizontal; manufacturer specs assume optimal orientation
  • ✗Ignoring thermal interface resistance — omitting θCS = 0.5°C/W (dry contact) underestimates Tj by 3-5°C at typical power levels; always use thermal compound
  • ✗Assuming linear scaling with power — at high power density (>1W/cm²), heatsink surface becomes thermally saturated; use CFD simulation or derate published θSA by 20-30%

Frequently Asked Questions

Thermal resistance θ (°C/W) is analogous to electrical resistance: ΔT = θ × P (compare to V = R × I). It quantifies how much temperature rise occurs per watt of power dissipated. Lower θ means better heat transfer. Typical values: TO-220 θJC = 1-2°C/W, thermal grease θCS = 0.1-0.2°C/W, small clip-on heatsink θSA = 10-20°C/W, large extruded heatsink θSA = 1-3°C/W.
θJC is fixed by package design and cannot be improved by the user — it represents the fundamental thermal bottleneck. Power packages (D²PAK, TO-247) achieve θJC < 1°C/W; surface-mount packages (SOIC, QFP) have θJC = 20-100°C/W. For high-power applications, package selection is critical: a 10W device in SOIC-8 (θJC = 40°C/W) has 400°C rise before even reaching the case.
Ambient temperature Ta sets the baseline — all temperature rises add to Ta. Industrial designs use Ta = 50-70°C; consumer electronics use Ta = 35-45°C. Increasing Ta from 25°C to 50°C requires either reducing power dissipation by 25°C/θJA watts or improving θJA proportionally. Always design for worst-case ambient per IPC-9592B reliability guidelines.
θJC: fixed by package (select lower-θJC package like D²PAK instead of TO-220). θCS: use thermal grease (0.1°C/W) instead of dry contact (0.5°C/W), or use phase-change material (0.05°C/W). θSA: larger heatsink area, more fins, forced air (3-5× improvement), or liquid cooling (10× improvement). Total system θJA can be reduced from 50°C/W (no heatsink) to <2°C/W (optimized liquid cooling).
Short-term: increased Rds(on) for MOSFETs (1.5-2× at Tj(max)), reduced hFE for BJTs, potential thermal shutdown (protection feature in many ICs). Long-term: accelerated wear-out per Arrhenius model — every 10°C above design target halves expected lifetime. Per JEDEC JEP122H, operating at Tj(max) continuously results in 1000-10000 hour MTTF; operating at Tj(max) - 50°C achieves 100,000+ hour MTTF.

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