Predicting Radiated Emissions Before FCC Testing

Pre-Compliance Scanning Is Not Enough on Its Own

Your Raspberry Pi-sized SBC has a 100 MHz processor clock, a 2 cm² power loop between the switching regulator and its bulk capacitor, and a 0.5 m USB cable for the host interface. The pre-compliance scan flags harmonics from 300 MHz upward at or above the FCC Part 15 Class B limit at 3 m.

You have four weeks before the scheduled FCC test, and a new board takes three. You need to know which change fixes the problem and which ones are wasted effort.

A pre-compliance scan tells you there is a problem, not why. Is it the power loop, or the USB cable acting as an antenna? Teams that don't know add ferrites everywhere, tighten every loop and slow every edge — which works, but costs time and money, and half of it does nothing.

The EMI Radiated Emissions Estimator models both differential-mode (DM) loop radiation and common-mode (CM) cable radiation, drives the DM loop with the trapezoidal clock's harmonics, and runs a Monte Carlo over the things you don't know precisely. That's the analysis that separates cause from coincidence.

Understanding the Two Radiation Mechanisms

Differential-mode radiation comes from current circulating in a closed loop on the board — the regulator's power loop, a decoupling return path, a fast trace and its return. It behaves as a small loop antenna. In the far field (at 3 m, above about 16 MHz) Paul's free-space expression gives:

with $f$ in Hz, $I$ the loop current in A, $A$ the loop area in m² and $r$ in m. Field rises with frequency squared and linearly with area: halve the area and you gain 6 dB.

Common-mode radiation comes from current flowing the same way on every conductor of a cable, with no nearby return. A short cable radiates as a monopole:

A few microamps are enough. CM radiation doesn't care how carefully the board is routed: the cable is the antenna.

The clock spectrum. A trapezoidal clock of peak current $I$, duty cycle $D$ and rise time $t_r$ has harmonics of one-sided amplitude

At 50 % duty the even harmonics vanish. Above $1/(\pi t_r)$ — 318 MHz for a 1 ns edge — the envelope falls at 20 dB/decade on top of the $1/n$ of the square wave.

Baseline Analysis: The Problem Design

The tool lists each harmonic's DM, CM and total field against the limit. The total is the root-sum-square of the two: Fields are in dBµV/m. The FCC Class B limits at 3 m are 40 dBµV/m to 88 MHz, 43.5 to 216 MHz, 46 to 960 MHz and 54 above.

CM dominates every harmonic, and increasingly so at high frequency, because the tool holds the stated CM current constant across the spectrum and the CM field rises linearly with frequency. That is a conservative assumption — measure or estimate the CM current near your worst harmonic if you can — but the conclusion does not depend on it: the cable is the problem.

Which Fix Matters

Change one thing at a time and watch the Monte Carlo's worst p95 margin, the tool's overall verdict:

Tightening the power loop cuts the DM field by 12 dB, and slowing the edges cuts it by 9 dB at 300 MHz. Neither moves the verdict while the cable dominates. This is the classic wasted week: a beautifully tightened layout that fails exactly as before.

The Fix: Choke First, Then the Rest

Apply all three changes — 0.5 cm² loop, 1 µA CM current, 2.5 ns edges:

Every harmonic now passes nominally. The Monte Carlo disagrees: the worst p95 margin is still −5.3 dB, near 954 MHz.

The Monte Carlo varies the current magnitude (log-normal, ±6 dB), the cable's orientation relative to the antenna, and the effectiveness of the ground plane. A design that passes by 0.5 dB nominally has no room for any of that. The test house will not measure your median unit in its best orientation.

How much CM rejection do you actually need?

Getting from 5 µA to 0.3 µA is about 24 dB of CM rejection at the frequencies that matter — a good USB common-mode choke plus a solid shield termination at the connector. Shortening the cable helps in proportion: 0.5 µA on a 0.3 m cable radiates exactly like 0.3 µA on 0.5 m, for the same +5.2 dB.

Implementation Notes

The CM choke goes on the USB lines right at the connector, on the board side. Once the noise is on the cable, a choke downstream of it does nothing. A common-mode choke presents high impedance to current flowing the same way on D+ and D− and very little to the differential signal. Check its CM impedance at 500 MHz–1 GHz, not only at 100 MHz — the harmonics that fail are the high ones. The power loop. Moving the bulk input capacitor next to the regulator's VIN and GND pins and returning through a solid pour cut the loop from 2 to 0.5 cm². That's 12 dB of DM field, because area enters the field linearly. It didn't change the verdict here, but it removes DM as a future problem once the cable is fixed. Slower edges. A series resistor of a few tens of ohms on the clock net, working against the input capacitance of the load, stretches the rise time from 1 ns toward 2.5 ns and moves the spectral corner from 318 MHz to 127 MHz. That cuts the DM contribution at 300 MHz by 9 dB. At 100 MHz, 2.5 ns is a quarter of the 10 ns period — check the receiver's input timing at that edge rate before adopting it, and don't go further: much slower edges turn the clock into a triangle wave.

All three changes are layout work plus one or two components. The CM choke and the series resistor can even be reworked onto existing boards for a pre-scan.

Updated 2026-09-19. The estimator now uses the published CISPR 32 and FCC limits and the full-amplitude clock harmonics. The numbers above replace an earlier worked example whose field levels, limits and "yield" figures came from an earlier version of the tool. EMI Radiated Emissions Estimator