How Much Power Is Your H-Bridge Wasting? Calculating MOSFET Losses in Motor Drivers

Why Motor Driver Losses Matter

You've picked your MOSFETs, laid out your H-bridge, and the motor spins. Job done? Not quite. The difference between a motor driver that works on the bench and one that survives in production often comes down to thermal design — and thermal design starts with knowing exactly how much power each FET is dissipating.

Motor driver losses fall into two clean buckets: conduction losses (resistive heating while the FET is on) and switching losses (energy burned during each on/off transition). Get these numbers wrong and you'll either over-spec your heatsink and waste board space, or under-spec it and watch your FETs go into thermal shutdown at the worst possible time.

Let's break down the math, work through a real example, and show you how to get answers in seconds with our open the Motor Driver Power Dissipation calculator.

Conduction Loss: The Steady-State Tax

Whenever a MOSFET is fully on, it behaves like a small resistor — its $R_{DS(on)}$. In a PWM-driven H-bridge, the FET isn't on 100% of the time; it's on for a fraction of the period defined by the duty cycle $D$. The RMS current through the FET during its on-time determines the conduction loss:

This is per FET. In a typical H-bridge, two FETs conduct simultaneously (one high-side, one low-side), so the total conduction loss across the bridge is $2 \times P_{cond}$ during active drive — but during freewheeling (recirculation), different FETs carry the current. For a full bridge under continuous PWM, you generally account for all four FETs, with each pair sharing the duty cycle and its complement.

A key gotcha: $R_{DS(on)}$ increases with temperature. The value in the datasheet is typically at 25°C. At a junction temperature of 100°C, expect it to be 1.5× to 2× higher. Always design with the hot value.

Switching Loss: The Speed Tax

Every time a MOSFET transitions from off to on (or vice versa), it briefly passes through its linear region where both voltage and current are simultaneously high. The energy lost per transition is approximately:

A practical way to estimate $t_{rise}$ and $t_{fall}$ when you know the gate charge $Q_g$ and gate driver current is to use $Q_g$ directly. The calculator uses a simplified but effective model:

where $f_{sw}$ is the PWM switching frequency. This scales linearly with frequency — which is why cranking up $f_{sw}$ to push audible noise above 20 kHz comes at a real thermal cost.

Worked Example: 24V, 10A Brushed DC Motor Driver

Let's size the losses for a fairly common scenario:

Conduction loss per FET: Switching loss per FET: Total loss per FET: Total bridge loss (4 FETs):

In a full H-bridge, two FETs are actively switching and two carry freewheeling current. The total bridge dissipation sums all four contributions. For this symmetric case:

Estimated driver efficiency:

The motor receives $V_{supply} \times I_{RMS} \times D = 24 \times 10 \times 0.75 = 180$ W of electrical power. The efficiency estimate is:

That's quite good — and it shows why low-$R_{DS(on)}$ FETs at moderate switching frequencies are so popular for motor drive. But notice what happens if you quadruple $f_{sw}$ to 80 kHz to eliminate any trace of acoustic noise: switching losses jump to 0.48 W per FET, total bridge loss climbs to 4.32 W, and you've added 50% more heat with no benefit to the motor.

Design Implications

A few practical takeaways from this analysis:

• Conduction loss dominates at low switching frequencies. If you're running at 10–20 kHz, focus your budget on low $R_{DS(on)}$ FETs.
• Switching loss dominates at high frequencies. Above 50 kHz, gate charge $Q_g$ becomes the critical parameter. Look for FETs optimized for switching figure-of-merit ($R_{DS(on)} \times Q_g$).
• Duty cycle matters for conduction, not for switching. Switching losses depend on frequency and load current, not duty cycle.
• Thermal derating is non-negotiable. Our example gives 0.72 W per FET. In a SOT-23 or PowerPAK package with $R_{\theta JA} = 50$ °C/W, that's a 36°C rise above ambient — manageable, but it tightens fast if airflow is restricted.

When the Numbers Get Uncomfortable

If the calculator shows bridge losses that push your junction temperature past 125°C (or whatever your FET's rated max), you have four levers:

1. Lower $R_{DS(on)}$ — bigger FET or parallel FETs
2. Lower $Q_g$ — faster-switching FET (often trades off against $R_{DS(on)}$)
3. Lower $f_{sw}$ — accept more ripple or audible noise
4. Better thermal path — exposed pad, thicker copper, heatsink, forced air

The calculator lets you iterate on all of these in seconds, which is exactly the point.

Try It

Plug your actual motor current, supply voltage, and FET parameters into the open the Motor Driver Power Dissipation calculator and see exactly where your watts are going. It's the fastest way to sanity-check your FET selection and thermal design before you commit to a PCB layout. Iterate on $R_{DS(on)}$, $Q_g$, and switching frequency until the numbers make your thermal engineer happy — or at least stop frowning.