VNA Fixture Effects: Diagnose Before You De-embed

The Problem: Your VNA Measures the Fixture Too

You've measured a 10 cm microstrip trace on Rogers 4003C from 10 MHz to 10 GHz, and there's a notch in S21 around 7 GHz. Before blaming the fab house, ask where you calibrated: at the SMA connectors, or at the edge of the trace?

Almost always it's the connectors. The two launches — via transitions, barrel discontinuities, pad mismatch — are still in the data, stacked on top of the trace you care about. Removing them is de-embedding. Deciding whether you need to, and whether the file is trustworthy enough to try, comes first.

The S-Parameter Analysis Pipeline is built for that first part. Upload one to four Touchstone files and it runs a fixed sequence of analyses, showing the result of each: view, passivity, ripple, TDR, time gating, mixed-mode conversion for 4-port files, S → Z/Y/ABCD conversion and — with two or more 2-ports — a cascade. It does not de-embed; the last section covers what that takes.

Step 1: View — Know What You're Looking At

The view stage plots magnitude, phase, group delay and VSWR for every uploaded file. A few red flags that the connectors, not the trace, dominate:

• A sharp S11 peak below 2 GHz — a launch pad too wide to hold 50 Ω.
• Ripple in S21 or S11 with a period matching the round trip between the two connectors, typically 50–100 ps for a short board. The ripple stage quantifies it: peak-to-peak variation in the passband, plus best, worst and mean insertion loss.
• A notch at a quarter-wave resonance of a connector pin or a via stub — work out the stub length and check where $c/(4l\sqrt{\varepsilon_r})$ lands.

  If S21 is flat to 6 GHz and then falls off a cliff, you may be looking at the connector's own bandwidth limit rather than the trace.

  Step 2: Passivity — Catch Bad Data Early

  A passive network cannot generate energy. The exact test is that the largest singular value of the S-matrix is at most 1 at every frequency. The column test, $|S_{11}|^2 + |S_{21}|^2 \le 1$, is necessary but not sufficient: it ignores phase.

  That difference is not academic. Our own demonstration files passed the column test at every point and still failed the singular-value test, with values up to 1.024, because their S11 was nearly in phase with S21. A near-lossless, symmetric line needs S11 roughly in quadrature with S21. The files have been corrected — but hand-edited or post-processed data fails this way easily.

  The pipeline treats violations in two ways:

  • Up to 1.02 — the size typical of VNA noise and calibration drift — it clamps the singular values to 1 at the offending points and passes the corrected data to the later stages.
  • Above 1.02 it assumes the data is intentionally active, such as an amplifier, labels it active and leaves it unmodified. Clamping an amplifier's gain to unity would corrupt everything downstream: for Pozar's 4 GHz GaAs FET example (largest singular value 2.79), a clamped matrix gives Z11 = 43.2 − j22.4 Ω instead of the correct 14.8 − j27.3 Ω.

  A passive DUT that shows up as active means the measurement is broken. Re-calibrate, check the reference impedance the file was saved with, and make sure the cables didn't move between the port-1 and port-2 sweeps. Time gating and de-embedding can't repair it.

  Step 3: TDR — Where Along the Structure?

  The TDR stage turns S11 into an impedance profile: the impulse response by inverse FFT, integrated into a step response ρ(t), then $Z(t) = Z_0 (1+\rho)/(1-\rho)$. Connector launches show up as impedance bumps at the start and end; a trace that is consistently off-target shows up as a plateau at the wrong impedance.

  Two limits apply. The time resolution is roughly $1/\text{BW}$ — about 100 ps for a 10 GHz sweep — so a 10 GHz file cannot separate discontinuities much closer than that. The distance axis assumes a velocity factor of 0.5 ($\varepsilon_{eff} \approx 4$); for other substrates, trust the time axis and scale it yourself.

  Step 4: Time Gating — Isolate the Main Reflection

  The gating stage transforms S11 to the time domain, applies a Hann window around the dominant reflection, and transforms back, plotting S11 gated and ungated. If the connector reflections sit outside the gate, the gated S11 shows the structure's own match without them.

  The pipeline chooses the gate automatically, so check that the dominant reflection is the one you care about. Gating works only when the responses you want to separate are further apart in time than the resolution above. It's a quick diagnostic, not a replacement for de-embedding.

  Step 5: Conversion and Cascading

  The conversion stage turns S into Z, Y and ABCD parameters. Some of those are genuinely undefined at some frequencies. A lossless line makes $I - S$ singular wherever it is a whole number of half-wavelengths long, so Z does not exist there. For a lossless 1 ns line sampled every 100 MHz from 0.1 to 4 GHz, 8 of the 40 points are undefined. The pipeline reports them as gaps, with a count, rather than failing the job.

  The cascade stage chains two or more 2-port files over their common frequency range — the connector file, then the trace, then the connector — through T-parameters. It builds a channel up from measured pieces, which is the inverse of what de-embedding does.

  Step 6: De-embedding — What It Needs

  De-embedding removes known fixture halves from a measurement. With each half described by its own S-parameters, converted to T-parameters:

  $$[T_{DUT}] = [T_{fixture,1}]^{-1}\,[T_{measured}]\,[T_{fixture,2}]^{-1}$$

  The hard part is knowing the fixture halves. The usual routes:

  • 2x-thru. Measure a thru board with the two launches back to back and no DUT, then split it into halves — the IEEE P370 methods do this. The open-source scikit-rf library implements them in Python.
  • Calibration standards at the DUT reference plane (TRL on the board), so the VNA's own calibration removes the fixtures.
  • An EM model of the launch, if you trust it.

  Run the pipeline on the raw measurement and on the fixture files first. A fixture file that fails passivity, or a TDR that shows the launches overlapping the DUT, tells you the de-embedding will not be clean before you spend time on it.

  Reading the Final Output

  Whichever way you remove the fixtures, three numbers matter for most designs:

  • Insertion loss at your signal's Nyquist frequency — 5 GHz for 10 Gbps NRZ. The Eye Diagram tool shows what a given loss does to the eye.
  • Return loss across the band. Better than −15 dB is acceptable for typical PCB traces and better than −20 dB is good. Worse in the middle of the band means a discontinuity somewhere.
  • Group delay flatness across the signal band. Steep variation causes intersymbol interference.
  Updated 2026-09-19. An earlier version of this article described operations the pipeline does not have — operation selection, adjustable gate parameters and a fixture de-embedding step — and a passivity test that ignores phase. It now describes what the pipeline does. S-Parameter Pipeline Tool