Maximum Pad Diameter Calculator
Find the largest pad that fits a component pitch while holding your fabricator’s clearance, with or without conductors routed between adjacent pads.
Formula
Reference: IPC-2221B clearance practice; the clearance value is a fabricator rule supplied as an input.
How It Works
This is the complement of asking what fits through the gap between two pads: it asks how much pad the pitch will allow in the first place.
Two adjacent pads share the pitch, and each contributes half its diameter, so together they consume one full diameter of it. With nothing routed between them a single clearance separates the pad edges, and the largest pad is simply the pitch less that clearance.
Every conductor routed between the pads costs more than its own width. It must stand clear of what is on each side of it, so adding one conductor costs one trace width plus one extra clearance. On a fine-pitch part that extra clearance is frequently the larger of the two.
When the clearances and conductors already exceed the pitch there is no pad that fits, and the result says which of the two is responsible rather than reporting a negative diameter.
The answer is a ceiling, not a recommendation. A larger pad improves solder joint strength and pad adhesion, and gives the fabricator more registration margin on a drilled hole. It also removes routing room and, on fine-pitch surface-mount parts, can encourage solder bridging. What this calculation gives you is the headroom you have to spend, and knowing that is what lets you spend it deliberately.
As with every clearance question, the rule belongs to the fabricator rather than to the formula, so it is an input here.
Worked Example
Take a 1.27 mm pitch — a common 0.05 inch through-hole grid — with a fabricator minimum clearance of 0.15 mm and nothing routed between the pads.
D_max = 1.27 − (0 + 1) × 0.15 − 0 = 1.12 mm
So pads up to 1.12 mm fit, leaving a 0.15 mm gap between their edges. The pad occupies 88.2% of the pitch, which the calculator flags: at that ratio there is no room left to route between these pads on this layer.
Now route one 0.15 mm conductor between them. The clearance count rises from one to two, and the conductor adds its own width:
D_max = 1.27 − 2 × 0.15 − 1 × 0.15 = 0.82 mm
The pad drops by 0.30 mm — twice what the trace itself occupies. That is the extra clearance making itself felt, and it is the single most common surprise in this calculation.
Tighten the pitch to 0.25 mm with a 0.3 mm clearance and the clearance alone exceeds the pitch. No pad fits at all, and the calculator says so rather than returning a negative diameter.
Practical Tips
- ✓Use this to find the headroom, then choose a pad below it deliberately rather than sizing to the limit.
- ✓If you plan to route between the pads later, include the conductor now — retrofitting it costs twice the trace width in pad diameter.
- ✓For drilled pads, check the annular ring requirement as well; the maximum here is a clearance limit, not a registration one.
- ✓Take the pitch from the nearest neighbour in any direction. On a staggered footprint that is often not the one on the drawing's main axis.
- ✓Where the pad-to-pitch ratio comes out above about 0.85, plan to route on another layer — this one is full.
- ✓Keep the clearance figure consistent with the one used in your breakout and pad-entry calculations so the whole footprint is checked against a single shop rule.
Common Mistakes
- ✗Assuming a conductor between pads costs only its width. It costs its width plus an extra clearance, because it needs clearance on both sides of itself.
- ✗Treating the maximum as the recommended size. It is a ceiling; a pad at the ceiling leaves no routing room and, on fine-pitch parts, invites bridging.
- ✗Subtracting two pad radii and one clearance separately. The pads together consume one full diameter, so the arithmetic is pitch minus diameter minus clearance.
- ✗Using the orthogonal pitch on a staggered array. The nearest neighbour is the one that binds, and on a staggered grid it may be diagonal.
- ✗Applying a copper clearance to a soldermask-defined pad without checking the mask geometry, which has its own registration tolerance.
Frequently Asked Questions
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