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Embedded Resistor Calculator

Calculate geometry for PCB embedded resistors from target resistance and sheet resistance. Supports NiP, TaN, CrSiO, and carbon materials.

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Formula

R=R□×LWR = R_{\square} \times \frac{L}{W}
R— Resistance (Ω)
R_□— Sheet resistance of resistive film (Ω/□)
L— Resistor length (mm)
W— Resistor width (mm)

How It Works

Embedded resistors are thin resistive films laminated into PCB inner layers during fabrication. The resistance follows the fundamental relationship R = R_sheet × (L/W), where R_sheet is the sheet resistance in ohms per square and L/W is the number of squares. A 'square' is any rectangle with equal length and width — a 1×1 mm square has identical resistance to a 10×10 mm square of the same material.

Common resistive materials include nickel-phosphorus (NiP, branded Ohmega-Ply) available at 25–100 Ω/□ with ±10% as-etched tolerance, tantalum nitride (TaN) at 25–100 Ω/□ with ±5% tolerance, and chromium-silicon oxide (CrSiO) at 250–1000 Ω/□ for high-value resistors. Laser trimming after fabrication can tighten tolerance to ±1–2% by cutting serpentine kerf into the film.

The key design consideration is that laser trimming can only increase resistance — it removes material. Therefore, embedded resistors are designed 10–20% below the target value, then trimmed up. The trim allowance directly determines the design geometry: a 100 Ω target with 10% allowance is designed at 90 Ω, which requires 3.6 squares (at 25 Ω/□) instead of 4.0.

Worked Example

Given: Target resistance = 100 Ω, NiP material (25 Ω/□), resistor width = 1.0 mm, trim allowance = 10% Step 1: Number of squares for target Nsquares=RtargetRsheet=10025=4.0N_{squares} = \frac{R_{target}}{R_{sheet}} = \frac{100}{25} = 4.0 squares Step 2: Resistor length for target L=Nsquares×W=4.0×1.0=4.0L = N_{squares} \times W = 4.0 \times 1.0 = 4.0 mm Step 3: Design resistance (pre-trim) Rdesign=Rtarget×(1−trim%100)=100×0.90=90R_{design} = R_{target} \times (1 - \frac{trim\%}{100}) = 100 \times 0.90 = 90 Ω Step 4: Design geometry Ndesign=9025=3.6N_{design} = \frac{90}{25} = 3.6 squares Ldesign=3.6×1.0=3.6L_{design} = 3.6 \times 1.0 = 3.6 mm Step 5: Power handling

Area = 1.0 × 4.0 = 4.0 mm². NiP power density = 25 mW/mm².

Pmax=4.0×25=100P_{max} = 4.0 \times 25 = 100 mW Step 6: Tolerance without trim

NiP as-etched: ±10%. With laser trim: ±5% (halved, capped at 5%).

Result: Design a 3.6 × 1.0 mm resistor, then laser trim to 100 Ω. Max 100 mW dissipation.

Practical Tips

  • ✓Use 25 Ω/□ NiP for 10–500 Ω range, 100 Ω/□ for 100–2000 Ω, and 1000 Ω/□ CrSiO for 1k–50k Ω to keep aspect ratios between 0.5:1 and 10:1
  • ✓Minimum width should be 10× the etch tolerance — for ±0.025 mm etch, use ≥ 0.25 mm width
  • ✓Place embedded resistors on internal layers away from the board surface to avoid mechanical stress from component soldering
  • ✓Always specify trim allowance in the fabrication drawing — the fab house needs to know the design-to-target offset
  • ✓For precision applications (< ±1%), use TaN material and specify 100% laser trim in fabrication notes

Common Mistakes

  • ✗Designing at the exact target value — trim can only increase resistance, so the as-fabricated resistor must be below target to allow trimming up
  • ✗Using too narrow a resistor width — etch tolerance (typically ±0.025 mm) has proportionally more effect on narrow resistors, increasing variation
  • ✗Exceeding 10:1 aspect ratio without serpentine layout — long thin resistors are fragile and prone to cracking during thermal cycling
  • ✗Ignoring temperature coefficient — NiP has TCR of +50–100 ppm/°C; a 100 Ω resistor shifts by 0.5% from 25°C to 75°C

Frequently Asked Questions

Practical range depends on material: NiP at 25 Ω/□ handles 5–2500 Ω (0.2–100 squares). CrSiO at 1000 Ω/□ handles 1k–100k Ω. Below 5 Ω requires extremely wide geometries; above 100k Ω requires impractical serpentine patterns.
As-etched: ±10–20% (worse than a 5% discrete). After laser trim: ±1–2% (comparable to precision thin-film discretes). The advantage is elimination of solder joints, reduced parasitic inductance, and board area savings.
Yes — embedded resistors have extremely low parasitic inductance (< 0.1 nH) compared to discretes (0.5–2 nH). This makes them excellent for RF terminations, attenuators, and bias networks up to 40+ GHz.
NiP: 25 mW/mm². TaN: 50 mW/mm². Carbon: 10 mW/mm². These are derated from the film's thermal limit by the surrounding dielectric's thermal resistance. Always verify that board-level thermal resistance can dissipate the heat.
Typically 15–40% added to base board cost for the resistive layer lamination plus 20–50% more if laser trimming is specified. Economical when replacing 20+ discrete resistors (saves pick-and-place cost, board area, and solder joint reliability risk).

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