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Minimum Conductor Spacing Calculator

Determine minimum electrical clearance between conductors per IPC-2221B Table 6.1 based on voltage and conductor condition.

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Formula

dmin=Table6.1(V,cond)×h/3048d_{min} = \text{Table}_{6.1}(V, \text{cond}) \times \sqrt{h / 3048}
d_minMinimum conductor spacing (mm)
VApplied voltage (DC or peak AC) (V)
hOperating altitude (m)

How It Works

IPC-2221B Table 6.1 specifies minimum conductor spacing (clearance through air) based on applied voltage and four conductor conditions. B1 covers internal conductors embedded in laminate where the solid dielectric provides insulation. B2 covers external uncoated conductors exposed to air. B3 covers permanent polymer coatings (solder mask). B4 covers conformal coatings applied post-assembly.

The table uses voltage breakpoints from 15V to 500V with linear interpolation between points. Above 500V, spacing increases linearly at a condition-specific rate. Internal spacing (B1) is much smaller than external (B2) because FR4 laminate has a dielectric strength of ~20 kV/mm versus air at ~3 kV/mm.

Altitude derating applies to external conductors (B2, B3, B4) above 3048 m (10,000 ft). Reduced atmospheric pressure lowers air breakdown voltage, requiring increased spacing. The derating factor is √(altitude/3048). Internal conductors (B1) are unaffected because the dielectric is solid laminate regardless of ambient pressure. This matters for avionics, satellites, and high-altitude equipment.

Worked Example

Given: 120 VAC mains (peak = 170V), B2 (external uncoated), sea level Step 1: Determine voltage

Use peak voltage: Vpeak=1202=170V_{peak} = 120\sqrt{2} = 170 V

Step 2: Find table breakpoints

170V falls between 150V (spacing = 0.60 mm) and 170V (spacing = 1.25 mm) in B2 column.

Actually, IPC-2221B Table 6.1 B2 column: at 170V the value is exactly 1.25 mm.

Step 3: Altitude derating

Altitude = 0 m (sea level), below 3048 m threshold → derating factor = 1.0

Step 4: Result dmin=1.25×1.0=1.25d_{min} = 1.25 \times 1.0 = 1.25 mm = 49.2 mils Comparison across conditions at 170V:
  • B1 (internal): 0.20 mm
  • B2 (external uncoated): 1.25 mm
  • B3 (polymer coated): 0.40 mm
  • B4 (conformal coated): 0.40 mm
Note: For IEC 60664-1 safety certification (medical/industrial equipment), creepage distance requirements may exceed IPC clearance values. Always check both standards.

Practical Tips

  • Always use peak voltage (or DC). For rectified AC, include the ripple peak. For switch-mode converters, include flyback spikes
  • Solder mask (B3) reduces required spacing by ~3× compared to bare copper (B2) — always mask high-voltage areas
  • Add slots or routed channels between high-voltage conductors to increase creepage path beyond the straight-line clearance
  • For safety-critical designs (medical, mains-connected), IEC 60664-1 and IEC 62368-1 have stricter requirements than IPC — check both
  • At board edges, the clearance requirement applies to the nearest conductor on an adjacent board in the system enclosure

Common Mistakes

  • Using RMS voltage instead of peak — IPC-2221B requires peak or DC voltage. 240V RMS = 340V peak, which doubles the required spacing
  • Applying B1 (internal) spacing to external conductors — internal spacing relies on solid laminate dielectric; external surfaces need much more clearance
  • Forgetting altitude derating for aircraft or satellite electronics — at 12,000 m altitude, spacing must be nearly doubled (factor ≈ 2.0)
  • Confusing clearance with creepage — clearance is through air; creepage is along a surface. PCB surfaces accumulate contamination that reduces surface breakdown voltage
  • Not accounting for transients — lightning surge or ESD events can produce momentary voltages far above nominal. Use the worst-case transient voltage for spacing calculation

Frequently Asked Questions

Per IPC-2221B B2 (external uncoated): interpolating between 30V (0.10 mm) and 50V (0.60 mm) gives approximately 0.50 mm. For B1 (internal): 0.10 mm. Add your fabricator's minimum clearance capability (typically 0.1 mm) to ensure manufacturability.
Yes — IPC-2221B explicitly lists 'permanent polymer coating such as solder resist' as condition B3. The key requirement is that the coating is permanent and applied as part of the PCB fabrication process, not post-assembly.
Above 3048 m (10,000 ft), external spacing is multiplied by √(altitude/3048). At 6096 m: factor = 1.41. At 12,192 m: factor = 2.0. This does not apply to internal conductors (B1) or to sealed/pressurised enclosures.
The table applies equally to DC and peak AC — breakdown depends on instantaneous voltage, not waveform. For AC, always use peak voltage (RMS × √2). For pulsed DC, use the pulse peak.
Yes — conformal coating (B4) allows the same spacing as polymer coating (B3), both significantly less than bare external (B2). However, conformal coating must be verified to have no voids, pinholes, or holidays over high-voltage gaps.

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