PCB Via Stub Resonance Calculator
Calculate via stub resonant frequency, signal notch depth, and backdrill benefit for high-speed PCB design. Optimize stub length. Free, instant results.
Formula
Reference: Eric Bogatin, "Signal and Power Integrity Simplified" 3rd ed.
How It Works
The Via Stub Resonance Calculator computes the quarter-wave resonant frequency of via stubs — essential for high-speed digital (>5 Gbps) and RF/microwave PCB design. Signal integrity engineers use this to identify frequency notches that cause 10-20 dB insertion loss at resonance, failing channel compliance for PCIe Gen4/5, USB4, and 100G Ethernet.
Per Johnson/Graham's 'High-Speed Digital Design,' a through-hole via creates a stub below the signal layer exit point. This stub acts as a quarter-wave resonator at f_res = c / (4 x L_stub x sqrt(Er)), where L_stub is the unused via barrel length. On a 1.6mm board with signal at layer 2 (0.2mm from top), the stub length is 1.4mm, resonating at 5.3 GHz on FR4 (Er=4.3).
Per IEEE 802.3 100GBASE-CR4 specs, maximum insertion loss at 12.5 GHz is 1.5 dB per via. A via stub resonating at 12 GHz causes 15+ dB notch — catastrophic for signal integrity. This is why back-drilling (controlled-depth drilling per IPC-6012E) is mandatory for 25+ Gbps channels, removing the stub to within 0.1-0.2mm of the signal layer.
Stub resonance Q-factor depends on via barrel resistance and dielectric loss. FR4 (tan_delta = 0.02) provides natural damping with Q approximately 10-15; low-loss materials like Rogers (tan_delta = 0.004) have Q = 50+, creating sharper notches. Counter-intuitively, lossy substrates may perform better at specific frequencies due to resonance damping.
Worked Example
Calculate stub resonance for a through-hole via on 6-layer 2.4mm board, signal transitioning at layer 3 (0.4mm from top), FR4 Er=4.3.
- Board thickness: 2.4mm
- Signal layer depth: 0.4mm from top surface
- Stub length: L_stub = 2.4 - 0.4 = 2.0mm
- Effective velocity: v = c/sqrt(Er) = 3e8/sqrt(4.3) = 1.45e8 m/s
- Resonant frequency: f_res = v/(4 x L_stub) = 1.45e8/(4 x 0.002) = 18.1 GHz
- For 25 Gbps signal (fundamental at 12.5 GHz): resonance at 18 GHz affects 3rd harmonic
- Back-drill requirement: To push resonance above 25 GHz, need L_stub < 1.4mm, so back-drill 0.6mm minimum
Practical Tips
- ✓Use HDI micro-vias for signals >10 Gbps — blind vias from L1 to L2 have no stub by design, eliminating resonance concerns up to 50+ GHz per IPC-2226.
- ✓Specify back-drill depth with +0.1/-0.0mm tolerance to signal layer — leaves minimal stub while avoiding drilling into signal plane per IPC-6012E.
- ✓For 25+ Gbps: place signal vias at layers closest to outer surfaces to minimize stub length even without back-drilling — saves cost on prototype boards.
Common Mistakes
- ✗Ignoring layer position in stub calculation — a signal at layer 2 versus layer 4 on same board has dramatically different stub lengths and resonant frequencies. Always track signal layer, not just board thickness.
- ✗Assuming back-drilling solves all problems — back-drill tolerance is +/-0.1mm per IPC-6012E; a 0.2mm residual stub still resonates at 37 GHz, affecting 112 Gbps PAM4 signals.
- ✗Forgetting that stub resonance is bidirectional — the notch appears in both S21 (insertion loss) and S11 (return loss), causing both signal degradation and reflection.
Frequently Asked Questions
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