Coplanar Waveguide vs Microstrip: When to Switch

The one-line version

Microstrip puts the return current a substrate thickness away. Coplanar waveguide puts it a gap width away, on the same layer. At low frequency nobody cares. Somewhere above a few GHz you start caring a lot.

Why the return path placement matters

Every signal needs a return. In microstrip that return runs in the plane underneath, separated by however thick your laminate happens to be — 0.5 mm, 1.6 mm, whatever the stack-up gives you. The loop between signal and return is set by the board, not by you.

CPW hands that control back. The grounds sit beside the trace, separated by a gap you choose. Want tighter field confinement? Narrow the gap. The loop shrinks, radiation drops, and coupling to whatever else is on the board drops with it.

There's a second consequence people notice sooner: shunt components get easy. On microstrip, grounding a shunt capacitor means a via, and that via has inductance you have to model. On CPW the ground is right there, a few hundred microns away. Shunt parts mount with almost no parasitic inductance. If you've ever chased a matching network that worked in simulation and not on the bench, via inductance was probably part of the story.

The formula, and why it looks strange

CPW impedance comes out of conformal mapping. Transform the cross-section and the awkward three-conductor geometry becomes a parallel-plate capacitor, which gives you:

$K$ is the complete elliptic integral of the first kind. Don't let that put you off — it's a well-behaved function and any decent tool evaluates it with the arithmetic-geometric mean in about five iterations.

The interesting part is what's missing. No substrate height. For an ideal CPW on a thick substrate, impedance depends only on the ratio $W/(W+2G)$. Scale the whole cross-section up or down and $Z_0$ doesn't move.

That's genuinely different from microstrip, where thickness is the dominant variable. It also means CPW scales cleanly: the same width-to-gap ratio gives the same impedance at 1 mm as at 100 µm.

Grounded CPW, and the trap in it

Nobody builds on an infinitely thick substrate. Most designs add a plane on the far side for heat and mechanical reasons, and now you have grounded CPW — GCPW, or conductor-backed CPW, depending on whose paper you're reading.

The backing plane pulls field down into the substrate. Effective permittivity goes up, impedance goes down:

Here's a check worth doing on any CPW tool you use. Push the substrate height up. As $h$ grows, $k_3 \to k$, $q \to 1$, and the whole thing should collapse to $\varepsilon_{r,eff} = (1+\varepsilon_r)/2$ — the ungrounded answer. If a calculator doesn't converge to that, its filling factor is wrong, and so is everything downstream.

The trap

Grounded CPW only behaves like CPW while the coplanar grounds dominate. Let the gap grow much wider than the substrate height and most of the field terminates on the backing plane instead. At that point you have microstrip with two useless strips of copper either side, and your CPW formula is off by tens of percent.

Rule of thumb: keep $G \lesssim h$. If your gap is three times the substrate height, stop calling it CPW.

Copper thickness matters more than you'd expect

This is the part most calculators get wrong, and it bites hardest exactly where CPW is most useful — tight gaps.

Finite metal thickness does two separate things:

1. It widens the strip and narrows the gap. Standard, well documented, lowers $Z_0$ a few percent at 1 oz copper.
2. It adds sidewall capacitance. The strip's sidewall faces the ground's sidewall across the gap — and that capacitance sits above the substrate surface, in air.

The second one is what gets missed. Because the added capacitance is in air, it raises the air-filled and substrate-filled capacitances by the same absolute amount, which pulls $\varepsilon_{r,eff}$ down.

How much? We checked against a 2-D electrostatic field solver. At 1 oz copper on a 0.3 mm gap it's about 3.5%. At 2 oz on a 0.15 mm gap it's over 13%. A zero-thickness formula misses all of it, and the error flows straight into propagation delay and guided wavelength — so your length matching is off by the same fraction.

If you're doing anything where delay matters, that's not a rounding error.

Stitching vias are not optional

The coplanar grounds and the backing plane form a parallel-plate cavity. Leave them connected only at the board edges and that cavity will resonate somewhere, usually somewhere inconvenient. It shows up as a sharp unexplained suck-out in S21 that moves when you change board size — which is actually a good diagnostic, because a real circuit resonance wouldn't.

Stitch both sides of the line with ground vias, spaced no more than λ/20 at your highest frequency of interest. Tighten that near connector launches and any other discontinuity. λ/40 there is not paranoid.

So when do you actually switch?

Use CPW when:

• You're above roughly 10 GHz and radiation and dispersion start to hurt.
• The substrate is thick enough that a 50 Ω microstrip would need an impractically wide trace.
• You have shunt components in the signal path and via inductance is eating your match.
• You're launching into a connector — the coplanar grounds line up naturally with the connector's outer contacts, which makes for a much cleaner transition.

Stay with microstrip when:

• The substrate is thin, under about 0.2 mm. The backing plane dominates regardless of gap, so you get microstrip behaviour plus extra fabrication constraints.
• Your fabricator's gap tolerance is loose. CPW impedance depends on the ratio of width to gap, so etch tolerance hits you twice.
• Nothing about the design needs it. CPW costs board area for the coplanar grounds and adds a stitching requirement. If microstrip works, use microstrip.

Practical notes

Keep the ratio constant. Through every taper, bend and pad transition, hold $W/G$. That's what preserves impedance — not the absolute dimensions. Necking down the centre conductor without narrowing the gap is a discontinuity, even though the trace "looks" continuous. Go as wide as your gap tolerance allows. Conductor loss falls with width, and a fixed etch tolerance is a smaller fraction of a wider feature. Watch surface roughness on low-loss laminates. CPW concentrates current at the gap edges, so edge roughness costs more than it does in microstrip. If you've bought expensive laminate for its loss tangent, don't hand the gain back through copper profile.

Run the numbers with the coplanar waveguide calculator — it handles both CPW and grounded CPW, includes the copper-thickness effect on impedance and effective permittivity, and tells you the gap that lands on 50 Ω for whatever centre width you picked.