Skip to content
RFrftools.io
PCB DesignAugust 16, 20264 min read

Dual Stripline: Why the Orthogonal Rule Isn't Optional

Two routing layers between one plane pair saves copper and money. It also creates the tightest coupling geometry available on a PCB. Here's the number, and why routing direction is the only thing that saves you.

Contents

The trade you're making

Dual stripline puts two routing layers between a single pair of reference planes. Normally each signal layer gets its own plane pair; here they share.

That's two copper layers saved, and a lamination cycle with them. On a dense board at volume it's real money — which is why dual stripline keeps showing up in cost-reduced designs even though signal integrity people grumble about it.

The grumbling is justified. You're trading fabrication cost for a coupling problem, and the coupling problem doesn't go away with careful spacing. It goes away with routing discipline or it doesn't go away at all.

Each layer on its own is just an offset stripline

Nothing exotic. Layer 1 sits some distance from the upper plane and further from the lower one. Layer 2 mirrors it. Both are offset striplines, solved the usual way.

One modelling point matters: the other signal layer is not a reference. It's a floating conductor carrying its own signal. Treating it as ground gives an optimistically low impedance and a false sense that everything's fine.

That assumption — other layer is floating, not ground — is exactly what breaks the moment two traces run parallel over each other. Which brings us to the actual problem.

The number

When two traces on adjacent signal layers run over each other, they face each other across a thin dielectric with no plane in between. That is the most tightly coupled structure you can build on a PCB.

Decompose it into modes. Odd mode puts an electric wall midway between the traces. Even mode puts a magnetic wall there, leaving each trace referenced mainly to its own plane. The backward-crosstalk coefficient falls out of the split:

kb=ZevenZoddZeven+Zoddk_b = \frac{Z_{even} - Z_{odd}}{Z_{even} + Z_{odd}}

For a typical dual-stripline geometry — 0.8 mm plane spacing, layers 0.33 mm apart, 0.13 mm traces in FR4 — that lands around 20%.

Twenty percent. A fifth of the aggressor's voltage appearing on the victim.

Compare that to edge coupling between neighbours on the same layer at normal spacing, which is a couple of percent. Broadside overlap is an order of magnitude worse, and no amount of within-layer spacing touches it, because the coupling isn't happening within the layer.

Push the two signal layers closer to each other than they are to their planes and it climbs past 50%.

So: route orthogonally

One layer horizontal, the other vertical. That's the rule.

With orthogonal routing, two traces on the two layers only overlap where they cross — a region a fraction of a millimetre long. Coupling scales with the coupled length, so an isolated crossing contributes essentially nothing. The 20% figure is the worst case for traces running parallel for a long distance, and orthogonal routing makes that distance zero.

Enforce it with a design rule, not with reviewer attention. Reviewers get tired. Design rules don't.

Where it goes wrong in practice

A differential pair on one layer, a fast clock on the other, directly above. This one is nasty, because the pair's common-mode rejection doesn't help. Broadside coupling from an aggressor sitting above the pair couples into both conductors nearly equally — that's common mode, and a differential receiver rejects differential noise, not this. It sails straight through. "Mostly orthogonal." A layer that's 90% vertical with a few long horizontal runs to dodge an obstacle. Those few runs are exactly where the coupling lives. Assuming both layers have the same impedance. They only match if the stack-up is symmetric. Whichever layer sits closer to its plane is the lower-impedance one. If both need to hit the same target, use different trace widths per layer — and put both numbers on the fabrication drawing, because the fabricator won't guess.

When to spend the money instead

Put a plane between the two signal layers if:

  • You're routing anything with a tight crosstalk budget — DDR, SerDes, fast strobes.
  • You can't guarantee routing discipline across the whole team and the whole project life, including the rev-C changes someone makes in a hurry.
  • The board already has enough layers that one more pair isn't the deciding cost.

Dual stripline is a cost compromise. It's a perfectly good one on dense, cost-sensitive designs where the signals are moderate and the routing is disciplined. It's a bad one when you're pretending the coupling isn't there.

Checking your own stack-up

A few things worth doing before committing:

  • Work out the coupling coefficient for your actual geometry, not a generic one. It varies a lot with layer separation.
  • Check both layers' impedance separately.
  • Verify the derived second-layer offset. It's easy to forget that both copper thicknesses come out of the plane-to-plane budget — 70 µm out of a 0.2 mm gap is a 35% error in the wrong place.
  • If the layers are separated by more than half the plane gap, treat any closed-form coupling estimate as approximate. That's outside where the simple models behave.

The dual stripline calculator gives impedance for both layers and the worst-case broadside coupling for your geometry, and warns when the numbers drift outside where the model is trustworthy.

Related Articles