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PCB DesignAugust 30, 20263 min read

The Clearance Costs More Than the Trace

Routing one conductor between two pads costs its own width plus an extra clearance — and on a fine-pitch part the clearance is the bigger half. The padstack arithmetic that decides layer count.

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A trace between two pads costs more than its own width

Here is the arithmetic that decides more layer counts than anything else on a board, and it is short enough to do in your head.

Two pads on a pitch P leave a channel of P minus one pad diameter. Not two — each pad contributes only its radius to the gap between them. Route N conductors through that channel and you need one clearance to the pad on each side, plus one between each adjacent pair: N+1 clearances in total. Whatever survives divides between the conductors.

W_max = (P - D_pad - (N+1) * C) / N

Take 0.6 mm pads on a 1.27 mm pitch with a 0.15 mm minimum clearance. The channel is 0.67 mm. One conductor needs two clearances, 0.30 mm, leaving 0.37 mm — generous, no surcharge, nothing to think about.

Now route a second conductor through the same channel. Clearance demand rises to three, 0.45 mm, and the remaining 0.22 mm splits two ways: 0.11 mm each. Still buildable at a fine-line process, but no longer routine.

The second trace did not cost you its own width. It cost its width plus another clearance, and on a fine-pitch part the clearance is the bigger half.

The same sum, run backwards

Sometimes the pad is the free variable, not the trace. Same geometry, different unknown:

D_max = P - (N+1) C - N W

On that 1.27 mm pitch with 0.15 mm clearance and nothing routed between, the largest pad that fits is 1.12 mm — occupying 88% of the pitch, which the calculator flags, because at that ratio there is no room left to route between those pads on that layer.

Decide to route one 0.15 mm conductor between them and the pad drops to 0.82 mm. Three tenths of a millimetre gone, for a trace 0.15 mm wide. The extra clearance again.

This is the single most common surprise in footprint work, and it is worth internalising as a rule: plan the routing before you size the pads, because retrofitting a trace between pads costs twice the trace width in pad diameter.

The clearance is not yours

Notice that every expression above takes C as an input. That is deliberate, and it is the part most calculators get wrong by baking in a house rule.

Fabricators differ. A shop quoting 0.15 mm standard, 0.1 mm fine and 0.075 mm advanced will price your board on their numbers, and a formula with someone else's minimum buried inside it produces an answer your shop rejects with nothing on the page explaining why. Put your fabricator's figure in and the answer is theirs.

Use the same figure across every geometry check on the footprint — pad entry, pad sizing, escape routing — so the whole thing is validated against one shop's capability rather than three different assumptions.

When nothing fits

The arithmetic can go negative. A 0.6 mm pad on a 0.8 mm pitch leaves a 0.2 mm channel; two clearances of 0.15 mm need 0.3 mm; there is no conductor width that works.

The right answer there is not a small number or a negative one. It is this does not fit, plus which constraint is responsible — and a good calculator refuses rather than rounding. A negative width rendered as a dimension is one of the more direct routes from a design review to an unbuildable board, because it looks like an answer.

When it does refuse, the fix is usually the pad rather than the clearance. The clearance is what your shop can physically hold; the pad is what you chose.

Bigger is not better

The maximum pad is a ceiling, not a recommendation.

A larger pad helps: better solder joint strength, more pad adhesion, more registration margin on a drilled hole. A larger pad also removes routing room and, on fine-pitch surface-mount parts, encourages bridging. Sizing to the ceiling means you have spent all your routing headroom without deciding to.

Compute the maximum so you know what the headroom is. Then choose something below it on purpose.

The neighbour that binds

One detail that catches people on staggered footprints: use whichever neighbouring pad is nearest, because that is the one that constrains you. On a square grid that is the orthogonal pitch. On a staggered array the diagonal neighbour can be closer than the one on the drawing's main axis, and sizing against the wrong neighbour produces a footprint that passes your check and fails the fabricator's.

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