Your Stripline Isn't Centred (And That's Fine)

Nobody builds a centred stripline

Open any textbook and stripline is drawn with the trace exactly halfway between two planes. Open your fabricator's actual stack-up and it almost never is.

The reason is boring: core and prepreg come in discrete thicknesses. 0.1 mm, 0.2 mm, 0.36 mm — whatever that vendor stocks. Unless your layer arrangement happens to divide evenly, the signal layer lands closer to one plane than the other. On an 8-layer board it's perfectly normal to sit 0.2 mm from one plane and 0.6 mm from the other.

That's an offset, or asymmetric, stripline. It's the common case, not the exception.

What the offset actually costs

Less than people fear, and in a different way than they expect.

Take a 0.15 mm trace in FR4, 1 oz copper, 0.2 mm to the near plane and 0.6 mm to the far one. Centred in the same 0.835 mm cavity you'd get about 65.5 Ω. Offset as described: about 58 Ω. Roughly 11% lower.

So the offset lowers impedance. That makes sense — the trace is closer to one plane, so capacitance goes up. And you fix it the boring way: adjust the trace width. Width is free. Custom lamination is not. Never ask a fabricator for a non-standard prepreg to recover a centred stack-up when a width change does the same job.

The thing that actually matters isn't the impedance shift. It's where the current goes.

Return current picks the near plane

Return current splits between the two planes roughly in inverse proportion to distance. With a 3:1 offset, something like three quarters of it flows in the near plane.

This is the practical consequence, and it tends to bite during EMC testing rather than at design review. A split, a void, or a dense cluster of antipads in the near plane forces the return to detour. That detour is loop area, and loop area is radiated emission and crosstalk.

The same defect in the far plane barely registers.

So when you route an offset stripline, know which plane is the near one and keep it unbroken for the whole route. Past about a 5:1 asymmetry you can treat the far plane as decorative for signal-integrity purposes and design entirely around the near one.

Why most offset formulas read high

Here's the part I found interesting while building the calculator.

The standard approach is Cohn's superposition. The trace sees two half-structures: one bounded by the near plane, one by the far plane. Mirror each half about its own plane and you get an ordinary symmetric stripline, whose capacitance is twice that of the half it came from. The two halves share one conductor, so their capacitances add.

It's elegant, it collapses exactly to the symmetric case when $h_1 = h_2$, and it correctly drives impedance to zero as either gap closes. All good properties.

It's also not exact, and the reason is subtle. Superposition quietly assumes a magnetic wall sitting on the trace plane outside the trace — meaning no field may wrap around the trace edge from one half to the other. Real structures have no such wall. Field does wrap around.

Write the capacitance as a parallel-plate part plus fringing:

Superposition always returns $F = 8\ln 2/\pi$, the symmetric fringing, no matter how offset the trace is. The true fringing grows sharply as the trace approaches a plane. That single omission is the entire error.

How big? We checked against a method-of-moments solver built on the exact parallel-plate Green's function — the kind of reference that reproduces the analytic centred stripline to about 0.0002%. Bare superposition runs a couple of percent high at typical offsets and reaches 14% when the trace sits very close to one plane.

If you've ever wondered why a board came back a few ohms off against a calculator that looked authoritative, this is a candidate.

The validity limit people skip

The familiar logarithmic stripline formula:

comes with a condition attached: it holds for a narrow strip, roughly $W/(b-t) < 0.35$. Past that the logarithm's argument collapses toward 1 and the answer falls apart. At $W/b = 2$ it under-predicts by nearly 80%.

That matters for wide, low-impedance routing — power distribution on inner layers, wide clock spines, anything deliberately fat. Plenty of tools apply the log formula everywhere and hand you a number that looks plausible and isn't.

The fix is the exact conformal-mapping solution, which holds at every width:

No branch, no crossover, no discontinuity where two approximations meet.

Sanity checks for any impedance tool

These take thirty seconds and catch real bugs:

1. Set both heights equal. A correct model returns exactly the centred stripline value. Not close — exactly.
2. Push one gap toward zero. Impedance should collapse toward zero, because the conductor is approaching a plane.
3. Sweep the width smoothly. Impedance should fall monotonically with no steps. A jump means the tool switched formulas mid-range.

We found a shipped implementation that failed the first two: it returned 1.089× the symmetric value at $h_1 = h_2$, and impedance went up as the trace approached a plane. Both are physically impossible, and neither is visible unless you go looking.

What to actually do

• Get the pressed stack-up from your fabricator, not the datasheet nominal. Prepreg thickness after lamination depends on how much copper it has to flow around.
• Compensate the offset with trace width.
• Identify the near plane and keep it solid under the route.
• Above a 3:1 offset, expect a few percent more uncertainty from any closed-form model, and get a field solve if the margin is tight.

The asymmetric stripline calculator uses the exact elliptic form with the fringing correction, and shows the centred value beside it so you can see what the offset cost.