BGA Escape Routing Starts at the Land Pad
How many traces fit between two BGA balls is decided the moment you pick the pad diameter.
Contents
The chain from pitch to trace count
Everything about BGA escape routing follows from one subtraction. Between two adjacent balls you have the pitch. The pads eat into it from both sides. What is left is the channel, and the channel decides how many traces get out.
For a 1 mm pitch BGA with 0.6 mm balls at IPC-7351B nominal density:
- Land pad: 0.55 mm
- Pad-to-pad gap: mm
- Escape routes through that channel: 2
- Maximum trace width: 0.125 mm
That last number is what your design rules have to live with. Two traces plus three gaps must fit in 0.45 mm, so at equal width and spacing each trace gets 0.125 mm and each gap 0.06 mm — or you trade width for spacing depending on which your fabricator prices better.
If you had drawn a 0.6 mm pad instead — matching the ball diameter, which feels natural — the channel drops to 0.4 mm and the two traces shrink to about 0.10 mm. A 0.05 mm pad decision costs 20 % of your trace width.
NSMD versus SMD
Non-solder-mask-defined pads have the mask opening larger than the copper. Solder-mask-defined pads have it smaller, so the mask overlaps the copper edge and defines the solder boundary.
NSMD is the default for good reasons. The solder wets the pad sides as well as the top, which gives a taller, more compliant joint and better thermal-cycling life. It also gives you the full copper pad as a routing anchor.
SMD trades that away for one thing: pad adhesion. The mask overlap mechanically restrains the copper, which matters on very fine pitch where a small pad can lift. Some device manufacturers specify it, and when they do, follow the datasheet — the joint reliability data behind that call is theirs, not yours.
What you should not do is mix them under one package. The joint standoff differs between the two, and mixing them across a single BGA puts uneven stress on the array during reflow and cycling.
Via-in-pad changes the arithmetic
Once pitch drops below about 0.8 mm, dog-bone escapes stop fitting — there is no room for a via next to the pad. Via-in-pad becomes the only route out.
That imposes its own constraint. The via must fit inside the pad with enough annular ring left, so the maximum drill is bounded by the pad diameter, not by your usual via rules. A 0.4 mm pad on a 0.5 mm pitch device leaves room for something around a 0.2 mm drill once you subtract the ring — which is microvia territory, not through-hole.
Via-in-pad also has to be filled and capped. An open via in a pad wicks solder away from the joint during reflow, starving it. Filled-and-plated-over is standard for this, and it is a real cost adder — but it is not optional, and boards get built with open vias in pads more often than they should.
Stencil aperture is a separate number
The pad diameter and the stencil aperture are not the same thing, and treating them as one is a common assembly problem.
For a 0.55 mm pad, a 1:1 aperture deposits paste over the whole pad. That is usually right for BGA — the ball supplies most of the solder volume and the paste is there for wetting and tack. Over-print and you get bridging on fine pitch; under-print and you get head-in-pillow on warped packages.
The area ratio matters more than the diameter as pitch shrinks. Below about 0.66 area ratio, paste release from the stencil becomes unreliable and you move to a thinner stencil or step it locally.
The escape width, exactly
The chain above gets you to "how many traces fit". It is worth writing the arithmetic out, because it is short and it decides your layer count.
Two adjacent lands leave a channel of the pitch less one land diameter — one, not two, since each land contributes only its radius to the gap. Put N traces in that channel and you need one clearance to each land plus one between each adjacent pair, so N+1 in total:
An 0.8 mm pitch part with 0.4 mm lands and a 0.1 mm clearance: the channel is 0.40 mm, one trace consumes 0.20 mm of clearance, and 0.20 mm of trace fits. Comfortable, standard process, one array row escapes per layer per side.
Now the case everyone eventually meets. A 0.4 mm pitch part with 0.25 mm lands, same clearance: the channel is 0.15 mm and the clearances alone need 0.20 mm. Nothing escapes. Not a thin trace — nothing. That single line of arithmetic is the whole reason fine-pitch parts drive you to via-in-pad and a build-up stack, and it is worth running before you commit to the package rather than after.
Escaping diagonally changes the geometry usefully. The diagonal neighbour sits pitches away, so the same 0.8 mm part gives an effective pitch of 1.131 mm, a channel of 0.731 mm, and 0.531 mm of trace. Often the difference between fitting and not — at the cost of crossing more of the array, which consumes routing space other escapes wanted.
The rows a single layer can break out equals the traces each channel carries, because every row inside the first must pass through every channel outside it. One trace per channel, one row per layer per side.
Escape strategy in practice
Count the channels before you commit to a layer count. A 256-ball 1 mm BGA with two escapes per channel gets its outer two rows out on the top layer and needs an inner layer for each further ring inward. That arithmetic decides your stack-up, and doing it after routing has started is expensive. Keep the corner balls for power and ground. They have the shortest escape and the most mechanical stress. Signals in the corners are the first to fail thermal cycling and the last to route cleanly. Do not fight the density level. IPC-7351B most-density exists for boards that need it and have the fabrication capability to match. If you are unsure, nominal is the right default — it is what the density tables were centred on. Check spacing against voltage, not just fabrication. A 0.06 mm gap is fine for logic and nowhere near sufficient if one of those nets carries anything above a few tens of volts.The BGA land pad calculator runs pitch and ball diameter through the IPC-7351B density levels and reports pad, mask opening, channel width, escape count, and the maximum trace width that actually fits.
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