Dual Stripline Impedance: Two Signal Layers

What Is Dual Stripline and Why You Actually Need It

Most engineers think about stripline as a single signal layer sandwiched symmetrically between two ground planes. That's the textbook definition, and it works fine for simple boards. But real life is messier. You've got a six-layer board, maybe eight layers, and you need to route high-speed signals efficiently without burning through your layer budget.

Dual stripline is when you have two signal layers between the same pair of ground planes. Layer 1 sits closer to the upper ground plane, Layer 2 sits closer to the lower ground plane, and they're separated by some dielectric material. This configuration is common in modern digital designs—think high-speed memory busses, LVDS pairs, or RF traces that need controlled impedance in tight spaces.

The catch? The geometry is more complex. You can't just calculate each layer independently like they're isolated striplines. The presence of the second signal layer affects the first layer's impedance. There's also broadside coupling to worry about if your traces overlap. And you need to know the propagation delay through both layers because they might be different.

That's exactly why you need the open the Dual Stripline Impedance Calculator.

The Geometry: What You're Actually Describing

Let's be concrete about the stack-up. Imagine a six-layer board:

• Layer 1: Ground plane (upper reference)
• Layer 2: Signal Layer 1 (what we call Layer 1)
• Layer 3: Dielectric (between the two signal layers)
• Layer 4: Signal Layer 2 (what we call Layer 2)
• Layer 5: Ground plane (lower reference)
• Layer 6: Power or ground

When you use the calculator, you're specifying:

• Trace Width: The width of your signal trace. Typical values range from 2 mils to 20 mils depending on your impedance target and current requirements.
• Plane-to-Plane Spacing: The total distance from the upper ground plane to the lower ground plane. This is the full height of your dielectric sandwich.
• Layer 1 to Upper Plane: How far Layer 1 sits from the upper ground plane. If your dielectric is 10 mils total and this value is 3 mils, then Layer 2 is 7 mils from the lower plane.
• Separation Between Signal Layers: The thickness of the dielectric material between your two signal layers.
• Copper Thickness: Whether you're using ½ oz (17.5 μm) or 1 oz (35 μm) copper. This matters more than you'd think—thicker copper slightly reduces impedance.
• Dielectric Constant: FR4 at 4.2, Megtron 6 at 3.4, Rogers RO4350B at 3.48. Pick the actual material your fabricator is using.

The calculator then gives you the impedance of each layer separately, the coupling characteristics, and propagation delay. That last bit is crucial if your two layers have different impedances—your signal integrity analysis needs both numbers.

A Real Example: Memory Bus on a Consumer Board

Let's walk through an actual design scenario. You're laying out a DDR5 memory interface on a six-layer board. Your fab shop is using FR4 with 1.6 mm total thickness, split as:

• 0.3 mm from top copper to upper ground plane
• 0.8 mm between ground planes (your stripline sandwich)
• 0.5 mm from lower ground plane to Layer 4 (power plane)

You want 90 Ω differential impedance for your data lines. You're using 1 oz copper throughout.

First, you need to figure out how to split that 0.8 mm between your two signal layers. A common approach is to put the upper layer closer to the upper ground plane for better shielding of sensitive signals, and the lower layer closer to the lower ground plane. Let's try 0.2 mm for Layer 1 to upper plane, which means 0.6 mm from Layer 2 to lower plane, with 0.2 mm of dielectric between them.

Fire up the calculator:

• Trace Width: 4 mils (we'll iterate)
• Plane-to-Plane Spacing: 31.5 mils (0.8 mm)
• Layer 1 to Upper Plane: 7.9 mils (0.2 mm)
• Separation Between Signal Layers: 7.9 mils (0.2 mm)
• Copper Thickness: 1 oz (35 μm)
• Dielectric Constant: FR4 (4.2)

The calculator returns roughly:

• Layer 1 Impedance: 58 Ω
• Layer 2 Impedance: 62 Ω
• Broadside Coupling: ~0.15 (if traces overlap)
• Propagation Delay: ~175 ps/inch for Layer 1, ~170 ps/inch for Layer 2

That's not 90 Ω. You need wider traces. Bump it to 6 mils:

• Layer 1 Impedance: 48 Ω
• Layer 2 Impedance: 52 Ω

Still too low. Try 3.5 mils:

• Layer 1 Impedance: 72 Ω
• Layer 2 Impedance: 77 Ω

Getting closer. At 3 mils you'd probably land around 90–95 Ω for Layer 1. But now you need to check: can your fab actually route 3 mil traces with your trace-to-trace spacing? Most modern fabs can, but you're burning routing complexity. And the propagation delay is now around 180 ps/inch, which is important for your timing analysis.

This is the real workflow. You don't just plug in numbers once. You iterate between impedance, trace width, and routing feasibility until everything works.

The Math: Why Layer 1 and Layer 2 Are Different

The impedance of a stripline trace is governed by:

where $h$ is the distance to the reference plane, $w$ is trace width, and $\varepsilon_r$ is the effective dielectric constant.

In a dual stripline, each layer has a different $h$ value. Layer 1 is closer to the upper plane, so it has a smaller $h$, which means lower impedance (all else equal). Layer 2 is farther from the upper plane but closer to the lower plane, so its effective $h$ is different.

But there's a complication: the presence of the second signal layer perturbs the field distribution. It's not exactly as if each layer sits in isolation. The calculator accounts for this coupling effect through a more sophisticated field-solving approach (usually based on conformal mapping or numerical methods). That's why you can't just calculate the two impedances independently and call it done.

The broadside coupling parameter tells you how much crosstalk you'll see if your traces on Layer 1 and Layer 2 run parallel and overlap. A coupling value of 0.15 means about 15% of the signal from one layer couples into the adjacent layer. That's enough to cause ringing and overshoot if you're not careful with your termination.

Common Mistakes (And How to Avoid Them)

Forgetting the Dielectric Between Layers

Most engineers assume the dielectric between Layer 1 and Layer 2 is just the core material with some resin. True, but the thickness of that core matters enormously. If your fab specifies "0.2 mm core," that's what goes in the calculator as "Separation Between Signal Layers." If you accidentally enter 0.4 mm, your calculated impedance will be off by several ohms. Double-check your stackup drawing before you start.

Asymmetry Blindness

Dual stripline is inherently asymmetric if Layer 1 and Layer 2 are at different distances from their respective ground planes. Some engineers treat this as a bug, but it's a feature if you use it intentionally. The closer layer to a ground plane has lower impedance and lower propagation delay. If you're mixing slow and fast signals, you can exploit this. But if you didn't intend the asymmetry, you'll get surprised by impedance mismatches during layout.

Ignoring Broadside Coupling

If your Layer 1 and Layer 2 traces run parallel and overlap for significant distances, broadside coupling is real. The calculator gives you the coupling coefficient, but many engineers ignore it and wonder why their differential signals look weird on the scope. If coupling is significant (>0.1), you need to either stagger your traces, keep them short, or use differential routing with careful length matching.

Copper Thickness Mistakes

Coppers thickness affects impedance more than people expect. Going from ½ oz to 1 oz copper can shift impedance by 2–4 Ω depending on your geometry. If your fab changes copper weight mid-production without telling you, your impedance shifts. Always confirm copper thickness on your fab drawing and in the calculator.

Wrong Dielectric Constant

FR4 is nominally 4.2, but it varies with frequency, temperature, and moisture. Megtron 6 is more stable at 3.4. Rogers RO4350B is tighter at 3.48 but costs more. If you're designing for high-frequency signals (>1 GHz), the choice matters. If you're doing DDR5 at 2.4 GHz, use the actual measured $\varepsilon_r$ from your fab's material data sheet, not the nominal value. It can be 5–10% different.

Propagation Delay and Timing Analysis

The calculator outputs propagation delay in ps/inch. This is critical for digital design. If Layer 1 has 175 ps/inch and Layer 2 has 170 ps/inch, and you're routing a 2-inch trace, Layer 1 arrives 10 ps later than Layer 2. That's noise-level for most digital signals, but for high-speed interfaces like LVDS or CML, it matters.

More importantly, if you're mixing signals from Layer 1 and Layer 2 on the same bus (which happens in dense layouts), the skew between layers can violate setup/hold times. Most tools let you specify per-layer propagation delays in their timing analysis. Use the calculator's output directly—don't round it.

When to Use Dual Stripline vs. Other Approaches

Dual stripline is great for high-density boards where you need multiple signal layers with controlled impedance. It's common in:

• High-speed memory interfaces (DDR4, DDR5, GDDR6)
• LVDS and CML signaling
• RF and microwave boards where you want shielding
• Mixed-signal designs where analog and digital need isolation

It's overkill for low-speed logic (I²C, SPI, GPIO). And it's not ideal for single high-speed traces where you'd prefer a dedicated stripline layer—the asymmetry of dual stripline isn't worth the routing complexity.

If you only have one signal layer between grounds, use the single stripline calculator. If you have two signal layers but they're not between the same ground planes (e.g., one is between ground and power), that's a different geometry entirely.

Try It Out

Grab your latest PCB stackup drawing. Find a high-speed signal that routes on two different layers between the same ground planes. Plug in your actual dimensions—trace width, plane spacing, copper thickness, and dielectric constant—into the Dual Stripline Impedance Calculator. Compare the calculated impedance to your target. If they don't match, adjust your trace width and run it again. Once you have impedance in the ballpark, check the propagation delay and broadside coupling. If coupling is high and you're worried about crosstalk, stagger your traces or increase layer separation.

That's the real design workflow. The calculator is the tool; understanding when and how to use it is the skill.