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PCB DesignAugust 18, 20264 min read

Your Stub Is 13% Too Short: εeff vs the Datasheet εr

A microstrip is half-buried in laminate and half in air, so the wave sees neither. Using the datasheet dielectric constant for a quarter-wave stub on FR-4 gets the length wrong by 13 percent — enough to move a filter edge hundreds of MHz.

Contents

The number on the datasheet is not the number the wave sees

FR-4 is quoted at εr = 4.3. A microstrip on FR-4 does not propagate as if εr were 4.3.

The trace has laminate below it and air above it. The field splits between the two, and the wave behaves as though it were in a single uniform medium of some intermediate permittivity εeff, strictly bounded by 1 < εeff < εr.

For a 0.3 mm trace on 0.2 mm FR-4 with 1 oz copper, εeff = 3.23. Not 4.3.

What that costs you

Physical length scales as 1/√εeff. At 2.4 GHz:

  • Free space quarter wave: 31.2 mm
  • Using εeff = 3.23: 17.38 mm
  • Using εr = 4.3: 15.06 mm

That is a 13.3 % error, in the direction of building the stub too short. On a filter, a 13 % length error moves the response edge by hundreds of MHz. On a matching stub it puts you on the wrong part of the Smith chart.

The same factor applies to propagation delay. εeff = 3.23 gives 5.99 ps/mm, or 152 ps/inch — the familiar "about 150 ps per inch" for FR-4 microstrip. A stripline on the same laminate is fully buried, so its εeff is εr, giving about 7.0 ps/mm. That 15 % difference is why outer-layer routing is faster, and why length-matching across a layer change needs delay matching rather than length matching.

Where εeff comes from

Hammerstad and Jensen fitted εeff to the exact quasi-static solution as a function of one shape parameter, u = w/h:

εeff=εr+12+εr12(1+10u)ab\varepsilon_{eff} = \frac{\varepsilon_r + 1}{2} + \frac{\varepsilon_r - 1}{2}\left(1 + \frac{10}{u}\right)^{-ab}

The fit holds to about 1 % over the range 0.05 ≤ u ≤ 20 with εr no greater than 12 — essentially all PCB work.

Two limits confirm it is doing real physics. As w/h → 0 the trace barely disturbs the interface and εeff → (εr + 1)/2, the arithmetic mean of the two half-spaces. As w/h → ∞ the field is squeezed entirely into the substrate and εeff → εr — a microstrip wide enough becomes a stripline in behaviour.

Copper thickness enters first as an effective width increase, because a conductor with real thickness presents sidewall to the field. Ignoring it overstates Z₀ noticeably on heavy copper.

The filling factor, and why it matters for tolerance

q=εeff1εr1q = \frac{\varepsilon_{eff} - 1}{\varepsilon_r - 1}

This says directly what fraction of the field energy sits inside the laminate. For the example above, q = 0.676 — roughly two thirds.

That number is the sensitivity coefficient for laminate tolerance. FR-4 εr is commonly specified ±0.2 or worse, and varies with glass weave, resin content, and frequency. A change Δεr in the laminate moves εeff by about q times Δεr, which propagates straight into your delay and impedance budget.

So a ±0.2 laminate spread on this geometry is about ±0.135 in εeff, or roughly ±2 % on delay. If your length matching budget is tighter than that, the laminate is your limiting factor, not your router.

Dispersion, and when to care

The quasi-static value is frequency-independent, which is not quite true. As frequency rises the field concentrates further into the higher-permittivity substrate and εeff climbs monotonically toward εr.

Getsinger's model captures it, and the correction scales as (f·h)². On the 0.2 mm substrate above, at 1 GHz the shift is 0.003 % — completely negligible. At 40 GHz it climbs to about 3.37 from 3.23.

The practical rule: on thin laminate below roughly 10 GHz, ignore dispersion. On 1.6 mm substrate, or anywhere above about 15 GHz, use the dispersive value for wavelength-critical structures. The frequency term and the thickness term multiply, so a thick board at moderate frequency can matter as much as a thin board at high frequency.

Things that quietly change εeff

Soldermask. Mask is roughly εr 3.5 and replaces some of the air above the trace. It raises εeff by 2 to 5 % on a typical 50 Ω line and lowers Z₀ by a similar amount. Bare-microstrip calculations do not include it. Trace width. Wider traces raise εeff. A board with mixed trace geometries does not have one propagation delay, so match on delay, not on physical length. Glass weave. The fibreglass bundles have higher εr than the resin between them. A trace running parallel to and directly above a bundle sees a different effective permittivity from one running over resin — the skew mechanism that forces zig-zag or rotated routing on fast differential pairs.

Guidance

Sanity-check every result against the bounds. εeff must lie between (εr + 1)/2 and εr. Outside that range means a units or geometry error, not a marginal model. Never use εr for an outer-layer length calculation. The only place the raw datasheet number is correct is a fully buried stripline. Quote delay in the units your audience uses — ps/inch for signal integrity conversations, ps/mm for layout arithmetic. They differ by 25.4, and mixing them is a routine cause of length-matching errors.

The effective dielectric constant calculator reports the static and dispersive values, filling factor, Z₀, velocity, delay in both unit systems, and guided wavelength.

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