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Critical Trace Length Calculator

Find the maximum PCB trace length before transmission-line effects matter. Compares your trace against Bogatin's 20% and 3× rise-time criteria and reports propagation delay.

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Formula

Lcrit=trk tpd,tpd=εr,effcL_{crit} = \frac{t_r}{k\, t_{pd}},\qquad t_{pd} = \frac{\sqrt{\varepsilon_{r,eff}}}{c}

Reference: E. Bogatin, "Signal and Power Integrity — Simplified", 2nd ed. (20% rule); E. Bogatin, "The Critical Length of a Transmission Line", Polar Instruments

L_crit— Critical trace length (mm)
t_r— Signal rise time (ps)
t_pd— Propagation delay per unit length (ps/mm)
εr_eff— Effective dielectric constant
k— Criterion divisor, 5 or 3

How It Works

Every PCB trace is a transmission line. The question is never whether it is one, but whether you can get away with pretending otherwise — and the answer depends entirely on how the trace delay compares to the signal's rise time.

A signal travels at c/εr,effc/\sqrt{\varepsilon_{r,eff}}, so the delay per unit length is

tpd=εr,effct_{pd} = \frac{\sqrt{\varepsilon_{r,eff}}}{c}

about 6.8 ps/mm for FR4 stripline and 5.6 ps/mm for FR4 microstrip. Microstrip is faster because part of its field runs through air, which lowers the effective permittivity.

The round-trip argument

When the driver switches, a wave sets off down the trace, reflects off the far-end mismatch, and returns after 2td2 t_d. If that whole round trip completes well inside the rise time, the driver is still transitioning when the reflection arrives — source and load stay in lockstep, and the net behaves as a lumped capacitor. Only when the round trip outlasts the edge does the reflection show up as a distinct step: ringing, overshoot, or a false clock edge.

That gives the critical length:

Lcrit=trk tpdL_{crit} = \frac{t_r}{k\, t_{pd}}

Two values of kk are in circulation. k=2k = 2 is the classic Johnson and Graham threshold — the round trip equals the rise time. k=6k = 6 is Bogatin's conservative form, which keeps overshoot under roughly 10% and is the right choice for anything with real timing margin.

What it means in practice

A 1 ns edge on FR4 microstrip gives a conservative critical length of about 34 mm — a little over an inch. A 150 ps DDR4 edge gives around 5 mm. This is why modern boards terminate almost everything: at current edge rates, essentially no trace is electrically short.

Note that the criterion depends on the edge rate, not the clock frequency. A 1 MHz signal with a 200 ps edge needs the same treatment as a 1 GHz clock with the same edge.

Worked Example

Problem: A 100 MHz LVCMOS clock with a 500 ps edge routes 80 mm across an FR4 board on an outer layer. Does it need termination?

Step 1 - Effective permittivity. On microstrip with FR4 (er = 4.2), part of the field runs in air, giving er_eff around 3.2.

Step 2 - Propagation delay: t_pd = sqrt(3.2) / 0.299792458 mm/ps = 1.789 / 0.2998 = 5.97 ps/mm

Step 3 - Trace delay: t_d = 80 mm * 5.97 ps/mm = 478 ps

Step 4 - Conservative critical length. Bogatin's 20% rule puts the trace delay at one fifth of the rise time: L_crit = 500 ps / (5 * 5.97 ps/mm) = 16.8 mm

Step 5 - Ratio: 80 / 16.8 = 4.8 times over the limit. This is emphatically a transmission line.

Step 6 - Even by the permissive rule, where the rise time need only exceed three times the delay, L_crit = 27.9 mm and the trace is still 2.9 times too long.

Step 7 - Fix. Route as controlled impedance and add a series termination resistor at the driver, sized as the line impedance minus the driver output impedance. For a 50 ohm line and a 20 ohm driver, use 33 ohm placed within a few millimetres of the output pin.

Step 8 - Compare with an inner layer. Stripline in the same FR4 gives t_pd = 6.84 ps/mm and L_crit = 14.6 mm — about 13% shorter, because there is no air in the field path.

Practical Tips

  • ✓Use the conservative rule by default and reserve the permissive rule for slow, non-critical nets like resets, LEDs, and configuration straps.
  • ✓Series terminate point-to-point nets at the driver; use parallel or Thevenin termination at the receiver for multi-drop topologies.
  • ✓Leave a footprint for a series resistor on any net near the limit, even if you plan to fit a zero-ohm link. Adding a pad later costs a board spin.
  • ✓Remember that at current edge rates almost everything is electrically long — treat termination as the default and short traces as the exception.
  • ✓Check the total delay against your setup and hold budget too. A trace can be electrically short and still blow the timing budget.
  • ✓Where a net exceeds the critical length, keep the reference plane solid for the whole route. Impedance control means nothing if the return path is broken.

Common Mistakes

  • ✗Judging by clock frequency instead of edge rate. A slow clock with a fast driver still needs termination; the criterion is about the transition, not the repetition rate.
  • ✗Using the same critical length for microstrip and stripline. Microstrip runs about 13% faster on FR4 because part of the field is in air, so it tolerates a proportionally longer trace.
  • ✗Placing the series termination resistor away from the driver. It must sit within a small fraction of the critical length of the output pin, or it becomes just another stub.
  • ✗Applying the permissive rule to signals with tight timing margin. It permits noticeable ringing — fine for a reset line, not for a strobe.
  • ✗Forgetting that the reference plane must be continuous. A trace that satisfies the length criterion still misbehaves if its return current has to detour around a plane split.

Frequently Asked Questions

It always is one. The practical question is whether you can ignore that fact, and you can only do so while the round-trip delay is a small fraction of the rise time. Bogatin's conservative threshold is a trace delay under 20% of the rise time, below which reflections are, in his words, virtually invisible.
They come from Bogatin and answer slightly different questions. Keeping the trace delay under 20% of the rise time makes reflections effectively invisible — that is the number to design to when timing margin matters. The looser threshold, rise time greater than three times the delay, still keeps ringing manageable and is adequate for slow, non-critical nets. Folklore versions of these rules divide by six or by two; neither figure appears in the primary sources.
Not for this criterion. Rise time alone determines whether reflections are visible. Clock frequency matters separately for timing budget, loss, and how much time the ringing has to settle between edges.
Because part of the microstrip field runs through air rather than laminate, the effective permittivity is lower than the bulk value — roughly 3.2 instead of 4.2 on FR4. Lower permittivity means faster propagation and a longer critical length.
Series termination at the driver for point-to-point nets — it is cheap, consumes no static power, and works well for a single load. Parallel or Thevenin termination at the far end for multi-drop, at the cost of DC current. Differential receivers usually specify their own termination.

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