Skip to content
RFrftools.io
Signal IntegrityMarch 1, 20268 min read

Eye Diagram Analysis: Validating 10 Gbps SerDes

A PCB designer routes a 10 Gbps SerDes lane across a 20 cm FR-4 trace with two connectors. Learn how to use S-parameter data and an eye diagram simulation to.

Contents

So you've just finished routing a 10 Gbps SerDes lane — maybe it's PCIe Gen 3, maybe XAUI — and it looks pretty clean. Twenty centimeters of FR-4, two edge-mount SMA connectors, differential impedance locked at 100 Ω, and your DRC passed without a single violation. The trace is straight, you kept vias to a minimum. Feels like a win.

Except here's the thing: at 10 Gbps, you're dealing with a Nyquist frequency of 5 GHz, and FR-4 is bleeding signal like crazy up there. Depending on what grade of FR-4 you picked (and let's be honest, most of us just take whatever the board house offers), you're losing somewhere between 0.5 and 1 dB per centimeter at that frequency. Do the math on a 20 cm run and you're already down 10 to 20 dB before the signal even hits a connector. Tack on another 1–2 dB per connector — and you've got two of them — and suddenly you're staring at 12 to 24 dB of total insertion loss at Nyquist.

That's enough to completely collapse the eye. Your receiver won't see clean ones and zeros anymore; it'll see a blurry mess.

The only way to actually know if your channel works, short of spinning the board and praying, is to simulate the eye diagram using real S-parameters. Let me walk you through how to do that.

Getting the Data: Measuring Your Channel with a VNA

First things first: you need a 2-port S-parameter file from a vector network analyzer. If you're doing this right, here's what that file should look like:

  • Format: Standard Touchstone .s2p file
  • Frequency sweep: Start at 10 MHz, go up to at least 15 GHz (I like to use 3× the data rate as a rule of thumb)
  • Number of points: 1001 or more — doesn't really matter if you use log spacing or linear spacing, both work fine
  • Reference impedance: 50 Ω single-ended (if you're measuring a differential pair properly, you'd want a 4-port .s4p file or at least a 2-port capture of the mixed-mode S21, but for a quick check, 50 Ω single-ended gets you in the ballpark)
Before you even fire up the eye diagram simulator, take a hard look at a few key S-parameters. They'll tell you if you're already in trouble:
S-parameterWhat It's Telling YouWhat You Want to See (10 Gbps)
S21 magnitude at 5 GHzHow much signal you're losing at NyquistBetter than −15 dB
S11 magnitude from DC to 5 GHzReturn loss, impedance matchingBetter than −10 dB
Group delay variationWhether you're going to get nasty ISILess than 50 ps peak-to-peak
If your S21 at 5 GHz is already sitting at −18 dB or worse, I can tell you right now: the eye's going to be closed. The simulation will just confirm what you already suspect, and you'll need to fix the channel before you even think about ordering boards.

Configuring the Eye Diagram Simulation

Alright, you've got your .s2p file. Head over to the Eye Diagram tool and punch in these settings:

ParameterWhat to EnterWhy
Data Rate10e9 bps (10 Gbps)This is your SerDes link speed
PRBS LengthPRBS-15Industry standard for bit error rate testing; long enough to really stress intersymbol interference
Samples per UI64Gives you decent time resolution without making your computer hate you
Input voltage swing800 mVpp differentialPretty typical for a 10G transmitter
Rise/fall time35 ps (10–90%)What you'd expect from a standard 10G TX driver
What the tool does is pretty clever: it takes your channel's frequency response (that's the S-parameters), convolves it with a pseudo-random bit sequence, applies the TX waveform you specified, and then overlays every unit interval on top of each other. That overlay is your eye diagram.

What a Good Eye Looks Like (and What a Bad One Looks Like)

When you're running at 10 Gbps, a healthy eye should give you:

Eye Opening Height150mVdiff\text{Eye Opening Height} \geq 150\,\text{mV}_{\text{diff}}
Eye Opening Width0.4UI40ps\text{Eye Opening Width} \geq 0.4\,\text{UI} \approx 40\,\text{ps}

The tool spits these numbers out directly, which is nice because you don't have to squint at the plot trying to measure things by hand. Here's a quick cheat sheet for interpreting what you see:

Eye HeightEye WidthWhat It Means
Over 200 mVOver 0.5 UIYou're golden — plenty of margin
100–200 mV0.35–0.5 UIMarginal territory — you'll probably need equalization
Under 100 mVUnder 0.35 UIFailed link — channel is too lossy
Let me give you a concrete example. Say you've got that 20 cm trace on Isola FR408, which is a step up from the cheap stuff. You might see an eye height around 180 mV and a width around 0.46 UI. That's marginal but workable. Now take the exact same geometry and use bog-standard FR-4 (the Tg 135 stuff that most board houses stock by default), and watch those numbers drop to maybe 80 mV height and 0.28 UI width. That's a closed eye. Your link won't train. You're done.

Fixing a Closed Eye: Your Options

So the simulation came back and the eye's shut tight. Now what? You've got a few levers you can pull.

Shorten the trace. This is the easiest fix if your layout allows it. Cut that 20 cm run down to 12 cm and you immediately recover something like 4 to 8 dB of insertion loss. Run the simulation again and see if that's enough to open things up. Upgrade your laminate. Standard FR-4 is killing you at high frequencies. Switch to a mid-loss material — Isola 370HR, Panasonic Megtron 6, something in that class — and you'll cut your loss at 5 GHz by 30 to 50 percent. Just make sure you recheck your impedance with the Controlled Impedance calculator because the new stack-up will change your trace geometry. Turn on equalization. Most 10 Gbps SerDes PHYs have a continuous-time linear equalizer (CTLE) built in, usually with adjustable peaking. If you can dial in 6 dB of boost at 5 GHz, you can rescue channels with insertion loss as bad as −22 dB. Some tools let you apply the CTLE transfer function directly in the simulation so you can see the equalized eye before you commit. De-embed your test fixtures. If your VNA measurement included launch structures or connector pads that won't actually be in the final design, you can de-embed those out. Even recovering 1 dB of artificial loss can sometimes push a marginal eye into passing territory. Most engineers skip this step and regret it later when they're debugging a board that should have worked.

The Via Stub Problem Nobody Talks About

Here's a failure mode that S-parameter simulation catches but your layout DRC will completely miss: via stub resonance.

Let's say you've got a through-hole via on a standard 1.6 mm board, and you're left with a 0.8 mm stub. That stub is going to resonate at roughly:

fstub=c4lstubεr3×10104×0.08×2.046.9GHzf_{\text{stub}} = \frac{c}{4 \cdot l_{\text{stub}} \cdot \sqrt{\varepsilon_r}} \approx \frac{3 \times 10^{10}}{4 \times 0.08 \times 2.0} \approx 46.9\,\text{GHz}

Okay, 47 GHz is way above your 5 GHz Nyquist frequency, so you're fine there. But now imagine you're routing through the middle of a thick backplane and you end up with a 3.2 mm stub. Suddenly that resonance drops to around 12 GHz — close enough to your signal bandwidth that it carves a nasty notch in your frequency response. That notch shows up as a bite taken out of your eye diagram, and you won't see it coming until you measure the board.

If you want to check this ahead of time, the Via Stub Resonance calculator will tell you exactly where your resonance lands before you even bother capturing S-parameters.

The Bottom Line: Measure, Simulate, Then Commit

Look, the eye diagram tool turns what used to be a gut-feel layout decision into something you can actually quantify. You upload your measured .s2p file, punch in your link parameters, and you get two critical numbers back: eye height and eye width. If both are comfortably in the green zone, great — send the Gerbers to fab and move on with your life. If they're not, you know exactly which knob to turn before you waste money on a board spin that was never going to work.

This isn't about being paranoid. It's about not being surprised when you power up the board and the link won't train. At 10 Gbps, the margins are thin enough that you can't afford to guess.

Run the Eye Diagram simulation

Related Articles