Documentation sections
Clock Tree Jitter Budget Calculator
POSThttps://rftools.io/
Slug clock-jitter. Calculate clock tree timing budget for FPGA and SoC designs. Enter reference oscillator jitter, PLL noise floor, buffer stages, and target clock frequency to compute setup margin.
Inputs
Send every one of these in inputs, in the units shown. Most are required: a call without one is refused (400) and costs nothing; one the calculator can do without takes the default shown. An input outside its range is still computed and flagged in the provenance.
| Name | Unit | Range | Default | Description |
|---|---|---|---|---|
| clockFreqMHznumber | MHz | 0.001 … 10000 | 200 | Target clock frequency at the destination register |
| setupTime_psnumber | ps | 0 … 5000 | 80 | From device datasheet — minimum setup time before clock edge |
| holdTime_psnumber | ps | 0 … 5000 | 40 | From device datasheet — minimum hold time after clock edge |
| refJitter_psnumber | ps | 0 … 10000 | 50 | RMS jitter of TCXO or VCTCXO — from oscillator datasheet |
| pllJitter_psnumber | ps | 0 … 10000 | 100 | RMS jitter added by PLL — from PLL datasheet or simulation |
| bufferJitter_psnumber | ps | 0 … 1000 | 25 | Additive jitter per clock buffer stage (e.g. CDCLVP1204: 20 ps) |
| bufferStagesnumber | none | 0 … 10 | 2 | Number of clock buffer/fanout stages between PLL and destination |
| traceDelay_psnumber | ps | 0 … 1000 | 20 | Clock tree routing skew — 150 ps/inch on FR4 at 6 mil trace |
| jitterTermsnumber | none | 0 … 6 | 0 | How many further jitter terms the clock path adds, each in quadrature (0–6) |
| term1Jitter_psnumber | ps | 0 … 10000 | 0 | RMS jitter added by another stage in the clock path, such as a different fanout buffer, a divider or a level translator |
| term2Jitter_psnumber | ps | 0 … 10000 | 0 | RMS jitter added by another stage in the clock path, such as a different fanout buffer, a divider or a level translator |
| term3Jitter_psnumber | ps | 0 … 10000 | 0 | RMS jitter added by another stage in the clock path, such as a different fanout buffer, a divider or a level translator |
| term4Jitter_psnumber | ps | 0 … 10000 | 0 | RMS jitter added by another stage in the clock path, such as a different fanout buffer, a divider or a level translator |
| term5Jitter_psnumber | ps | 0 … 10000 | 0 | RMS jitter added by another stage in the clock path, such as a different fanout buffer, a divider or a level translator |
| term6Jitter_psnumber | ps | 0 … 10000 | 0 | RMS jitter added by another stage in the clock path, such as a different fanout buffer, a divider or a level translator |
Outputs
Returned in values, by key. A value that is unbounded or undefined is null.
| Field | Unit | Description |
|---|---|---|
| setupMargin_psheadline | ps | Setup Margin |
| totalJitter_ps | ps | Total Jitter |
| budgetUsed_pct | % | Budget Used |
| availableBudget_ps | ps | Available Budget |
| periodPs | ps | Clock Period |
| bufferTotalJitter_ps | ps | Buffer Total Jitter |
Calling it
- Calculate: one call, the request and response in full, and its errors.
- Batch: this calculator with others, or a sweep, in one request.
- Solve for a target: the value of one input that brings an output to a target.